In a doubly-resonant coil there is nothing to limit the primary current. The tank capacitor cancels the primary's reactance and the resistance reflected back from the secondary is small until there is an arc out. Without protection the coil destroys itself, and it does not take long.
Two behaviours, and they are not interchangeable
- OCD ends the bang there and then, and waits for the interrupter's next pulse. Right for an ordinary DRSSTC with short bangs.
- Pulse skip drops a single cycle of the bridge and lets the bang carry on. Right for long bangs, which means right for a QCW.
On a QCW the difference is the whole thing. Cutting a ramp off in the middle is the pop you can hear: the bang tears, the arc never finishes growing. Pulse skip shaves the peaks without killing the bang. It is implemented in Daniel Marx's UD2.9 and in WaskaLabs' UD29X, where it is a SKIP_EN jumper.
And do not confuse this pulse skip with pulse skip as a way of shaping a ramp. Here it is protection. As a replacement for a buck modulator it has failed three times in public.
It needs its own current transformer
Sharing one ring between feedback and protection is a common and expensive mistake. The feedback path has the phase lead network hanging off it, that loads the first stage, the core saturates, and the protection gets weaker exactly when it is needed.
A comparator, not a Schmitt trigger
Do not use a 74HC14 for current protection. A logic trigger's thresholds move with temperature and supply, and this is the one place that needs a threshold you can predict. It is an argument Anders Mikkelsen and davekni have both made: a design that can work is not the same as a design that will.
Why it did not fire
- The threshold is far above the dial. The burden resistor is not the one the scale was calculated for.
- Protection exists and has never once operated. The pot is jammed against the op-amp's limit, which means it is switched off.
- It fires late and the switches are already dead. The protection is slow, a few cycles, so the threshold has to sit below the destructive current rather than at it.
- It got weaker after the phase lead went in. Shared CT, saturating core.
Where to set it
Start low and raise it as you learn. Gao started at 120 to 125 A and worked upwards. That is the right way round, because the current is not something you calculate in advance: there is a documented case of 300 A calculated and 50 A measured.
The threshold is set by the primary, the capacitors and the coupling, not by the power you would like to have.
When the arc strikes ground
The topload voltage collapses in 100 to 250 nanoseconds. The arc takes the load off the secondary, so the primary rings up. Which means the overcurrent protection usually fires after the event rather than at it.
A ceiling in firmware is not protection
If the firmware limits the buck's output to, say, 440 V on a 650 V bus, that ceiling holds only while the buck is intact. When its switch fails short, or the clamping diode conducts on the inductor's energy return, the bridge gets the full bus. You want either a hardware clamp or devices with genuine margin.
The rest of the safety chain
- UVLO, because when the supply sags the isolators emit a spike that turns both devices on.
- Fail-safe on the fibre. A broken fibre must turn the coil off, which means a divider that pulls the receiver's input to off rather than leaving it undefined.
- A bleeder across the bus bank. Not optional.
- A duty cycle limit in the interrupter.
The two rings on the DRSSTC diagram are this and the feedback one, drawn separately because that is the point. Take the tank capacitor out on the QCW page and the overcurrent ring goes with it: nothing is cancelling the primary's reactance any more, so the primary's own impedance is the limit.