A standard DRSSTC driver will not run a QCW as it stands. The startup, the overcurrent behaviour, the burden and its phase lead all need changing, and the buck needs bleeders and an amplitude limit.
The list
- A starting oscillator, or self-oscillation. To reach and hold the upper pole when nothing else holds it there. Not mandatory in itself: the section below gives three ways to get there, and two of them leave the driver alone (a damper across the primary capacitor, and a primary tuned slightly above the secondary). It is mandatory when you are forcing the upper pole from a primary tapped below the secondary, which is the case the rest of this article covers.
- A decision about what overcurrent does, which is not the same as fitting pulse skip. Cutting a ramp in the middle gives a pop instead of a sword, and letting the burst run through the trip can finish it on the lower pole, which is not a sword either. Both settings fail, and the order to try them in is worked out below. A choice, not a mandatory change.
- A smaller burden resistor, so the feedback strength lands in its working window of 0.02 to 0.04 V/A. Mandatory.
- The phase lead coil to match the new burden. The lead is set by the ratio
L/R, so if you dropRyou must dropLwith it. Change both or neither. - Bleeder resistors on the buck's output. Without them the ramp does not come back down, because a buck can only add charge. Mandatory.
- An amplitude limit, so the bridge is not taken past its voltage rating. Useful, but it is not protection: if the buck's switch fails short, the bridge gets the full bus whatever the firmware thinks.
Three ways to hold it, and why this page is about the third
A damper across the primary capacitor
This is an R+L+C branch in parallel with the tank capacitor, sized to spoil the lower pole's Q while leaving the upper one alone, so the loop has nowhere attractive to fall into. It is passive and does not touch the driver. It is also the only one of the three that wastes power on purpose: the mode is suppressed by dissipation in that resistor, taken from the same tank that feeds the sword.
We list it as an option, not a recipe. None of the builds we have read publishes an R, an L and a C for a named coil, so there is nothing to copy and you will have to size it on the bench. If you have values for a machine that ran, please post them: this is the only one of the three that needs no soldering near the driver, and it is the least documented.
A primary tuned slightly above the secondary
This costs nothing and needs no parts: you put the pole where the driver was going to settle anyway. There are two costs. It puts the operating point rather high, and it gives up the detuning rule that the ramp's frequency page argues for, so it is a trade, not a free saving. It can also happen without you choosing it. loneoceans ran his first QCW on an unmodified UD2.7A with no oscillator and no PLL, and recorded that the coil "oscillates itself to the upper pole". Whether yours does the same has to be measured, not assumed; see the paragraph further down about finding out which of the three you need.
Forcing it with an oscillator, which is the one that changes the driver
There are two ways to do it, and on a UD2.7 or a UD2.9 they differ a lot in effort.
Self-oscillation turns the comparator already on the board into the oscillator. It takes three parts and the board is still a UD. The next section covers it, because it is the version people have actually done on these boards and written up.
A PLL replaces the comparator and the flip-flop, which on a UD is the half of the board that decides the frequency. That makes it a different driver, not a modification. The documented example is Steve Conner's PLL driver, and it does not work quite the way the name suggests. The oscillator runs all the time at a frequency set by hand on a TUNING trimmer. When a burst begins, that oscillator is switched through to the gates, and only then is the loop enabled. It "adjusts the oscillator frequency to try and move the zero crossings of CTSIG1 so they occur just as the bridge is switching". A LOOP GAIN trimmer sets how hard it pulls. A TARGET PHASE trimmer "allows you to skew the desired phase to compensate for delays in the gate driver and H-bridge", so the L/R network becomes a knob you can turn while the coil runs. At the end of a burst the loop is disabled and the oscillator is reset to its free-running value, so every burst starts from the same known frequency instead of wherever the last one ended.
The same TUNING knob also picks the pole, which is what a ramp needs. With the secondary fitted there are two settings of TUNING that satisfy the loop, and the manual names them: "Both are valid operating points, however they react to streamer loading in different ways."
Two things in the same manual are the reason we still recommend self-oscillation. The first is that a PLL is a follower and needs something to follow:
One of the LEDs may light if the DC link voltage is zero or very low. This just means that the primary current is so small the PLL can't get enough signal to lock. It should go out as the DC link voltage is increased: in tests, 30V DC usually gave enough signal.
That was written about a DRSSTC, where the bus is at full voltage from the first cycle, so the sentence only matters when tuning at low power. On a ramp it matters a lot. A QCW starts every burst at almost no bus voltage, so the loop is blind for the stretch where the QCW is climbing up from nothing. A self-oscillating comparator has no such threshold, because it is the source, not a follower. How long each board stays blind, and what it uses to decide it can stop, is covered in every bang starts open loop.
The second is in the manual's errata. Under strikes to the primary something in the driver latches up, the gate drivers stick on and a resistor smokes, and the author's diagnosis is "the 4046 latching up and stopping its oscillator, due to spikes coming in through CTSIG1". A QCW's long arc makes a ground strike likely, not exceptional.
You may see a PLL described differently: a 74HC4046 with its VCO centred on the upper pole, the capture window trimmed so the lower pole falls outside it, and an XOR phase detector as the more robust choice under strikes. That description comes from general practice, and we have found no source for it. The one published Tesla coil PLL driver that has a manual centres nothing: it free-runs where you set it and corrects from there.
Self-oscillation, from the people who did it
The recipe comes from Mathieu thm's first QCW thread, and davekni confirmed it two posts later in the same thread:
Mathieu thm: "I looked at the self oscillation mode for the ud2.7, removed R7, put a 50k resistor between pins 3 and 7 of the TL3116 and changed C33 for a 300pF one." davekni: "Looks ideal! I recommend staying with self-oscillation." (HVF 3132)
If you open that second link, note that davekni quotes the value back as "a 300nF one". That is a slip for the 300 pF Mathieu wrote, not a different recommendation. A 300 nF capacitor in that position would put the oscillator three orders of magnitude lower, in the kilohertz, and nothing else in the exchange suggests that.
davekni proposes the same modification independently in his long exchange with Rafft on HVF 1914: "one option is to modify UD2.7 to be self-oscillating", with his own schematic, and the two changes are the same: take out the 100 k R7 and set the frequency with C33. He also says why he does it, on the next page of it: "All my coils are self-oscillating". He was surprised to find that none of the standard UD1 and UD2 drivers were.
How it works: the comparator's hysteresis feedback runs in two parallel branches, a DC one through R7 at 100 kΩ and a pulse one through R26 and C33. Removing R7 and running a resistor from the output back to the signal input turns the comparator into an oscillator. It starts swinging on its own instead of waiting for the current transformer.
The capacitor sets the frequency, roughly:
f [kHz] ~ 139000 / C [pF]That constant is one board's calibration, not a property of the capacitor. It was fitted to a single result, Mathieu thm's "I set the c33 to have 450kHz in 'self oscillation'" with the 300 pF above (HVF 3132), which it reproduces to within three per cent [derived, 139000/300 = 463 kHz against his 450]. The widget below shows the same caveat. The frequency is set by the whole hysteresis network, not by C33 alone. davekni, sizing the same capacitor for a comparator board with the input resistor raised to 5 to 7 k, expected "C33 value of ~560-680pF would result in 450kHz operation" (HVF 1914), which works out to a constant near 280 000 instead of 139 000 [derived, 620 × 450]. That is twice as much, on a board built for the same job. The two capacitor values below apply to this machine only. On yours, work from the frequency measured on the comparator output with the bridge dead.
More precisely, put it slightly above that pole, not on it. This part often gets left out. It is davekni's advice: "To get phase lead at startup, self-oscillation frequency needs to be set slightly higher than upper pole frequency" (HVF 1914). His reason is the lead on the first cycle. The fence argument below is ours. Neither depends on a particular coil:
lower pole < upper pole < self-oscSet like this, the pole you want sits between the oscillator and the pole you do not want, and has to be crossed to reach it, so the upper pole acts as a fence. Set the oscillator below the upper pole, either between the two poles or under both, and the fence is gone, because the unwanted pole is no longer behind the wanted one.
The capacitor sets where the oscillator lands, and on one machine two neighbouring values make the difference between a fence and no fence:
poles at 317 and 519
250 pF -> 556 kHz
317 < 519 < 556 fence
270 pF -> 515 kHz
317 < 515 < 519 no fenceTwenty picofarads moves the oscillator from just outside the pair to between them. At that frequency the upper pole protects nothing: the driver already starts on the wrong side of it, and the lower pole is downhill all the way. That is the case for the smaller value. Reading it as "515 is close enough to 519" gets it backwards. Being close does not help, because what matters is which side of the pole the oscillator is on.
One number does improve at the rejected value, and it can talk you into it. Sitting almost on top of the pole makes the drive into it stronger: the excitation figure goes from 23.6 dB at 250 pF to 40 at 270, because 515 kHz is almost exactly 519 [derived, the widget above: each pole's response at the oscillator's frequency, off the unloaded peak sharpnesses]. The widget shows a bigger number next to a red verdict. The number that improves is not the one that decides. What decides is which side of the pole the oscillator sits on, and at 270 pF it is on the wrong side, with the lower pole downhill and nothing in the way. A stronger drive only gets you to the wrong mode faster.
Two smaller points from the same work. It only works with the phase lead network in circuit, because otherwise the loop does not close properly. And a 1N4148 is better than a Schottky in that path, because more voltage on the node gives a cleaner oscillation.
Seven things change, and only three of them are the oscillator
The other four are the rest of the conversion. Leave them out and a board that self-oscillates nicely on the bench will kill transistors on the coil.
do on a UD2.7 why
1 the 100k DC hysteresis branch remove R7 stop it waiting
2 50k, comparator output back fit pins 3 to 7 make it swing
to its signal input of the TL3116
3 the hysteresis capacitor revalue C33 this is the
frequency
4 the feedback burden reduce R1 0.02 to 0.04 V/A
5 the lead inductor reduce L1, SLOT 7 the network
with it holds L/R
6 the lead network leave in J4 not open or the loop
will not close
7 the clamp in that path 1N4148 not a Schottky cleaner swingLines 1 to 3, 6 and 7 are from Mathieu thm and davekni, quoted above. Lines 4 and 5 are the burden and lead pair from the list at the top. The J4 in line 6 is on the board itself: a hole on the edge, shown on the UD boards page, which the UD2.7C schematic annotates: "If phase lead is not used, J4 must be shorted."
Line 3 comes with a firm rule: the oscillator goes above the upper pole, not on it and not below it. The capacitor value follows from that and from where your poles actually are. Do not copy a value from somebody else's thread.
Two arguments lead to the same rule. davekni's is about the first cycle: "To get phase lead at startup, self-oscillation frequency needs to be set slightly higher than upper pole frequency" (HVF 1914). Ours is the fence: with the oscillator above the upper pole, the pole you want stands between it and the pole you do not, so the coil has to cross the good one to reach the bad one.
lower pole < upper pole < self-oscOn the department's own coil, whose poles with no arc out are 317.0 and 519.1 kHz, that means landing above 519.1, and 250 pF puts the oscillator at 556 kHz. (The self-oscillation calculator adds 10 pF of board stray, fitted on one measured board, and puts 250 pF at 535 kHz: lower, but still above the pole.) Twenty picofarads more drops the oscillator between the two poles, and then there is no fence. The driver starts on the wrong side of the pole that was supposed to hold it, and the unwanted pole is downhill with nothing in the way. The widget in the section above works through that case, and it is why you should do this sum instead of copying a number.
The order of work matters and will save you a day: choose the frequency from the rule first, and only then find the capacitor that gives it on your board, by measuring on the comparator output with the bridge dead. The 139000 / C constant matches one builder's board to three per cent and another's only to a factor of two. Use it to pick a first capacitor, nothing more.
Five calculators, in the order the work actually happens
- Whether you need any of this. Coupled poles takes the general case, primary and secondary tuned to different frequencies, and says which pole a stock driver will sit on. If it says the upper one, your coil is like loneoceans' and this whole section is optional. If it says the call is too close (the primary tuned just below the secondary), look on the scope before deciding.
- The capacitor, from a frequency you have already chosen. Self-oscillation frequency is written for exactly this modification, R7 out and 50 kΩ in, and it runs backwards: leave the capacitor field empty, enter the target frequency, and it returns the value to fit with stray capacitance accounted for. It forces the order recommended above.
- Whether the oscillator holds long enough to get there. The frequency alone does not answer this. Being above the upper pole decides which way the coil is pushed; how long it is pushed decides whether it gets there. Feedback strength gives the primary current at which the loop takes control from the oscillator, which is the same as asking whether the oscillator runs long enough to pull the coil onto the upper pole. Line 4 is what changes that number, and changing it has a cost either way.
- The lead inductor that goes with the new burden. Phase lead runs in whichever direction you need, since inductance, angle and time are tied together once the frequency and the burden are known. Current transformer covers the problem that appears once the burden is small: what stray inductance in the sense loop costs you.
And on a UD2.9 the designators are not these
This matters more here than anywhere else in the article, because the recipe was written for a UD2.7 and the two boards look the same.
On Marks' UD2.9, C33 is a 2.2 µF ceramic disc, a different component doing a different job, and fitting 250 pF there changes something you did not intend to change. On WaskaLabs' UD29X the capacitor you actually want is C22, according to that board's README. The feedback burden is R1 on the UD2.7C and R3 on Marks' UD2.9.
So on anything other than a UD2.7, treat the seven lines above as functions and find each part by continuity. The hysteresis network runs in two parallel branches off the comparator's output: a DC one through the 100 k resistor, which is the one that comes out, and a pulse one through a resistor and capacitor in series, which is the one that gets revalued. A table of designators by revision, with sources, is on the UD boards.
What changes, and why each of them changes
The driver does the same four jobs as on any coil: it finds the frequency, fires early to make up for its own delay, decides when a bang runs, and stops when the current is too high. On a ramped coil all four change, and one of them turns into a different job. The list at the top is the bench version; this section gives the reasons.
Finding the frequency, while the frequency runs away
Every coil's frequency falls as the arc grows, because the arc adds capacitance. On a DRSSTC that happens over a few hundred microseconds, and the feedback loop follows it without any special effort.
On a QCW it happens over twenty five milliseconds and the shift is large. The secondary can move by tens of per cent across one ramp, and the driver has to track it the whole way up. That is why the QCW articles talk so much about the two poles. Coupling splits the resonance in two, the driver sits on one of them, and on a QCW it has to sit on the upper one and stay there. Left alone, a coil can settle on the lower one.
There are three ways to hold it up there, and only one of them changes the driver (covered two sections down).
Which one your coil needs has to be measured. loneoceans ran his first QCW on an unmodified UD2.7A, with no oscillator and no PLL, and recorded at first light that the primary was set at turn 7.5, 392 kHz, "but coil oscillates itself to the upper pole", with the running frequency going from 465 kHz at the start of the ramp to 434 kHz at the top. The coil in the ramp's frequency page settles on the lower pole instead and has to be forced up. Find out which kind yours is before you change the driver.
Firing early, while the target moves
The lead is set by an L and an R in the feedback path, and that network gives a constant angle. The hardware needs a constant time, because the delays through the comparator, the logic and the transformer are a fixed number of nanoseconds.
You can make the two agree at one frequency. Across a ramp that sweeps by a sixth they drift apart. This is the basic limit of the technique, and a QCW runs straight into it.
It depends which sweep you mean. The secondary's own resonance falls about 16.7 per cent under a 1.5 m arc. The bridge is actually commutating at the pole, and a pole moves less because the primary stays where it was tapped: 10.7 per cent on the same machine. So the lead drifts by less than either figure suggests. Worked across the ramp it comes to 4.3; that article covers the full trajectory, gives the arc length for every percentage, and explains why a larger figure once quoted here was withdrawn.
One thing does get easier. The lead needed to commutate the bridge rises as the frequency falls, and the network happens to deliver more lead at the same time. The margin widens across the ramp instead of closing, the only place in this machine where that happens.
Deciding when to run: this is now two jobs
On a DRSSTC the interrupter says start and stop. On a QCW the same box also tells the buck converter what voltage to hold at each moment, and that instruction is the ramp.
The box in that position is therefore a modulator, not an interrupter, and it has no ontime of its own: the bridge runs for as long as the ramp lasts. Bangs per second drop from hundreds to five or seven. A QCW run at two hundred would be an explosion.
Which protection mode, and the word that means two things
A UD2.9X offers both modes, and the manual's own wording describes them. Ordinary OCD: the pulse ends and goes back to steady state until the next interrupter pulse. Pulse skip: it drops a single oscillation without killing the pulse completely.
On a DRSSTC pulse skip is the gentler of the two and the choice hardly matters. On a ramp both settings fail, they fail differently, and which one you want depends on what your trips turn out to be. The next section works it out with numbers, including how far the bad case is from a sword.
Start with ordinary OCD and add pulse skip later, if at all. The board and its wording are WaskaLabs' UD2.9X.
Which of the two, and why the order matters more than the choice
An overcurrent detector that ends the bang is right for a DRSSTC. On a ramp it is a disaster: cut the ramp in the middle and the arc never finishes growing, so you get an audible pop instead of a sword. That much is obvious, and many conversions stop thinking there.
Ordinary OCD ends the pulse and returns to steady state until the next interrupter pulse, which on a ramp means until the next bang. Pulse skip drops a single oscillation of the bridge without killing the pulse, so the burst continues.
In time lost, pulse skip wins easily. One cycle at this machine's frequencies is about two microseconds and a QCW burst is 25 ms, so a skipped cycle costs 0.008 per cent of the bang. An OCD trip halfway up the ramp costs the remaining 12.5 ms, half of it. Pulse skip is roughly six thousand times cheaper [derived, one period at 490 kHz against a 25 ms burst], and that ratio is the main reason to fit it.
In which mode the coil ends up, it loses just as clearly. Pulse skip diagnoses nothing. It lets the burst carry on through whatever caused the trip, and if the cause was the driver losing the upper pole, the bang finishes on the lower one. On this machine the upper pole runs from 519.1 down to 463.3 kHz across the ramp and never gets near the 300 kHz where arcs stop growing as straight swords. The lower pole starts at 317.0 kHz with no arc out, 5.7 per cent above that line [derived], and leaves the sword band before 1.5 m at every capacitance in the measured range. The burst completes, but as a branched arc.
The order you try them in matters more than which you end up with. Start with ordinary OCD, because you can tell when it trips, and add pulse skip once you know what your trips actually are. If they are transients, the six thousand to one saving is real. If they are the loop losing its pole, pulse skip turns a bang you would have noticed into one you will not.
Be careful with the designators
There is good news in the same fact. The comparator core did not change from UD2.1 through 2.5 to 2.7; Ward wrote that the main logic and drive circuits are unchanged. So the recipe carries over between revisions and onto clones, as long as you follow the logic and not the part numbers.
The one that is not on the list
None of the above turns a DRSSTC into a QCW by itself, because the buck is not part of the driver. The modulator is a separate converter with its own switch, its own choke and its own gate supply, covered in the department in one part.
Why the upper pole has to be forced, and not just preferred, is explained on the ramp's frequency page: with plain feedback this coil settles on the lower pole at both ends of a bang, so without the changes above the machine does not work.
What the driver does in general, on any coil, is covered in four jobs on one board.
The QCW diagram labels its driver "driver and lead" because of the phase lead coil in the list at the top, and gives the modulator its own line running up the outside to the buck.