A standard DRSSTC driver will not run a QCW. Here is what actually has to be touched and why, so that nobody has to work it out by removing components until something changes.
The list
- A starting oscillator, or self-oscillation. To reach and hold the upper pole when nothing else is holding it. Not mandatory in itself: the section below lists three ways up there and two of them leave the driver alone, a damper across the primary capacitor and a primary tuned slightly above the secondary. This one is mandatory when you are forcing the upper pole from a primary tapped below the secondary, which is the case the rest of this page is about.
- A decision about what overcurrent does, which is not the same as fitting pulse skip. Cutting a ramp in the middle gives a pop instead of a sword, and letting the burst run through the trip can finish it on the lower pole, which is not a sword either. Both settings are failures and the ordering is worked out below. A choice, not a mandatory change.
- A smaller burden resistor, so the feedback strength lands in its working window of 0.02 to 0.04 V/A. Mandatory.
- The phase lead coil to match the new burden. The lead is set by the ratio
L/R. DropRand you must dropLwith it. These two go together or not at all. - Bleeder resistors on the buck's output. Without them the ramp does not come back down, because a buck can only add charge. Mandatory.
- An amplitude limit, so the bridge is not taken past its voltage. Worth having, and it is not protection: if the buck's switch fails short the bridge gets the full bus regardless of what the firmware thinks.
Three ways to hold it, and why this page is about the third
A damper across the primary capacitor
An R+L+C branch in parallel with the tank capacitor, sized to spoil the lower pole's Q while leaving the upper one alone. The loop then has nothing worth falling into. It is passive, it does not touch the driver at all, and it is the only one of the three that costs power on purpose: what suppresses the mode is dissipation in that resistor, taken out of the same tank the sword is paid for from.
It is carried here as an option and not as a recipe. No build this corpus has read publishes an R, an L and a C for a named coil, so there is nothing to copy and the sizing is yours to do on the bench. Anyone who has values for a machine that ran should post them, because this is the one of the three that needs no soldering iron near the driver and it is the least documented.
A primary tuned slightly above the secondary
Free, and it fits no parts at all: put the pole where the driver was going to settle anyway. Two costs. It puts the operating point rather high, and it gives up the detuning rule that the ramp's frequency page argues for, which is a trade rather than a saving. It is also the one that can happen without being chosen: loneoceans ran his first QCW on an unmodified UD2.7A with no oscillator and no PLL, and recorded that the coil "oscillates itself to the upper pole". Whether yours does that is measured and not assumed, which is the paragraph further down this page about finding out which of the three you need.
Forcing it with an oscillator, which is the one that changes the driver
Two forms, and on a UD2.7 or a UD2.9 they are not close in cost.
Self-oscillation turns the comparator that is already on the board into the oscillator. Three parts and the board is still a UD. It is the whole of the next section, because it is the one people have actually done on these boards and written down.
A PLL replaces the comparator and the flip-flop, which on a UD is the half of the board that decides the frequency. That is a different driver rather than a modification, and the documented example is Steve Conner's PLL driver. It also does not work the way the phrase suggests. The oscillator runs all the time at a frequency set by hand on a TUNING trimmer; when a burst begins that oscillator is switched through to the gates, and only then is the loop enabled. It "adjusts the oscillator frequency to try and move the zero crossings of CTSIG1 so they occur just as the bridge is switching". A LOOP GAIN trimmer sets how hard it pulls. A TARGET PHASE trimmer "allows you to skew the desired phase to compensate for delays in the gate driver and H-bridge", which is the L/R network replaced by a knob you can turn while the coil runs. At the end of a burst the loop is disabled and the oscillator is reset to its free-running value, so every burst starts from the same known frequency instead of from wherever the last one ended.
It also picks the pole with that same knob, which is the property a ramp wants. Fit the secondary and there are two settings of TUNING that satisfy the loop, and the manual names them: "Both are valid operating points, however they react to streamer loading in different ways."
And two things in the same manual are why this page still sends you to self-oscillation. The first is that a PLL is a follower and needs something to follow:
One of the LEDs may light if the DC link voltage is zero or very low. This just means that the primary current is so small the PLL can't get enough signal to lock. It should go out as the DC link voltage is increased: in tests, 30V DC usually gave enough signal.
That is written about a DRSSTC, where the bus is at full voltage from the first cycle and the sentence is only about tuning at low power. On a ramp it is not a footnote: a QCW starts every burst at nearly no bus voltage by definition, so the loop is blind over exactly the stretch a QCW spends climbing out of nothing. A self-oscillating comparator has no such threshold, because it is the source rather than a follower. How long each board stays blind, and what it uses to decide it can stop, is every bang starts open loop.
The second is in that manual's own errata. Under strikes to the primary something in the driver latches up, the gate drivers stick on and a resistor smokes, and the author's diagnosis is "the 4046 latching up and stopping its oscillator, due to spikes coming in through CTSIG1". A ground strike is the event a QCW's long arc makes likely rather than exceptional.
Self-oscillation, from the people who did it
The recipe came out of Mathieu thm's first QCW thread and was confirmed by davekni two posts later in the same thread:
Mathieu thm: "I looked at the self oscillation mode for the ud2.7, removed R7, put a 50k resistor between pins 3 and 7 of the TL3116 and changed C33 for a 300pF one." davekni: "Looks ideal! I recommend staying with self-oscillation." (HVF 3132)
What is happening there. The comparator's hysteresis feedback runs in two parallel branches, a DC one through R7 at 100 kΩ and a pulse one through R26 and C33. Removing R7 and running a resistor from the output back to the signal input turns the comparator into an oscillator: it starts swinging on its own instead of waiting for the current transformer.
The capacitor sets the frequency, roughly:
f [kHz] ~ 139000 / C [pF]And put it slightly above that pole rather than on it, which is the part usually left out. It is davekni's: "To get phase lead at startup, self-oscillation frequency needs to be set slightly higher than upper pole frequency" (HVF 1914). His reason is the lead at the first cycle; the fence argument below is ours, and neither is specific to any one coil:
lower pole < upper pole < self-oscSet that way, the pole you want sits between the oscillator and the pole you do not, and has to be crossed to reach it: the upper pole becomes a fence. Set the oscillator below the upper pole and the fence is gone, whether it lands between the two or under both: either way the pole you do not want is no longer behind the pole you do.
The capacitor is what sets it, and on one machine the difference between two neighbouring values is the difference between a fence and no fence:
poles at 317 and 519
250 pF -> 556 kHz
317 < 519 < 556 fence
270 pF -> 515 kHz
317 < 515 < 519 no fenceTwenty picofarads, and the oscillator moves from just outside the pair to between them. At that frequency there is nothing for the upper pole to protect: the driver is already on the wrong side of it and the lower pole is downhill all the way. That is the whole argument for the smaller value, and reading it as "515 is close enough to 519" gets it exactly backwards: being close is what makes it useless, because the sign of the gap is what does the work.
Two smaller notes from the same work: it only functions with the phase lead network in circuit, because otherwise the loop does not close properly; and a 1N4148 is preferable to a Schottky in that path, because more voltage on the node makes for cleaner oscillation.
Seven things change, and only three of them are the oscillator
The other four are the conversion the rest of this page is about, and leaving them out is how a board that self-oscillates beautifully on the bench kills transistors on the coil.
do on a UD2.7 why
1 the 100k DC hysteresis branch remove R7 stop it waiting
2 50k, comparator output back fit pins 3 to 7 make it swing
to its signal input of the TL3116
3 the hysteresis capacitor revalue C33 this is the
frequency
4 the feedback burden reduce R1 0.02 to 0.04 V/A
5 the lead inductor reduce L1, SLOT 7 the network
with it holds L/R
6 the lead network leave in J4 not open or the loop
will not close
7 the clamp in that path 1N4148 not a Schottky cleaner swingLines 1 to 3, 6 and 7 are Mathieu thm's and davekni's, quoted above. Lines 4 and 5 are the burden and lead pair from the list at the top of this page. The J4 in line 6 is the board's own: a hole on the edge that the UD boards page shows, and that the UD2.7C schematic annotates: "If phase lead is not used, J4 must be shorted."
Line 3 carries the rule, and it is a rule rather than a preference: the oscillator goes above the upper pole. Not on it, and not below it. The value of the capacitor follows from that, and from where your poles actually are, never from a value copied out of somebody else's thread.
Two people arrive at the rule from different ends and both are worth having. davekni's reason is the first cycle: "To get phase lead at startup, self-oscillation frequency needs to be set slightly higher than upper pole frequency" (HVF 1914). Ours is the fence: put the oscillator above the upper pole and the pole you want stands between it and the pole you do not, so the coil has to cross the good one to reach the bad one.
lower pole < upper pole < self-oscOn the coil this department owns, whose poles with no arc out are 317.0 and 519.1 kHz, that means landing above 519.1, and 250 pF puts the oscillator at 556 kHz. Twenty picofarads more drops the oscillator between the two poles, and then there is no fence at all: the driver starts on the wrong side of the pole it was supposed to be held by, and the one you do not want is downhill from there with nothing in the way. That case is worked through with the widget in the section above, and it is the reason to do this sum rather than inherit a number.
Then the order of operations, which is the part that saves a day: choose the frequency from the rule first, and only then find the capacitor that gives it on your board, by measuring on the comparator output with the bridge dead. The 139000 / C constant reproduces one builder's board to three per cent and another's to a factor of two. It sizes your first capacitor and settles nothing.
Five calculators, in the order the work actually happens
- Whether you need any of this. Coupled poles takes the general case, primary and secondary tuned to different frequencies, and says which pole a stock driver will sit on. If it says the upper one, your coil is loneoceans' case and the whole of this section is optional.
- The capacitor, from a frequency you have already chosen. Self-oscillation frequency is written for exactly this modification, R7 out and 50 kΩ in, and it runs backwards: leave the capacitor field empty, put the target frequency in, and it returns the value to fit with stray capacitance accounted for. The tool enforces the order this section argues for.
- Whether the oscillator holds long enough to get there. This is the half of the rule that the frequency alone does not settle. Being above the upper pole decides which way the coil is pushed; how long it is pushed decides whether it arrives. Feedback strength gives the primary current at which the loop takes control away from the oscillator, which is the same question as whether the oscillator gets long enough to drag the coil onto the upper pole. Line 4 is what moves that number, and moving it is not free in either direction.
- The lead inductor that goes with the new burden. Phase lead runs in whichever direction you need, since inductance, angle and time are one fact once the frequency and the burden are known. Current transformer carries the part that bites once the burden is small: what stray inductance in the sense loop costs you.
And on a UD2.9 the designators are not these
This matters more here than anywhere else on the page, because the recipe was written against a UD2.7 and the two boards look identical.
On Marks' UD2.9, C33 is a 2.2 µF ceramic disc, a different component doing a different job, and fitting 250 pF in its place changes something you did not mean to change. On WaskaLabs' UD29X the capacitor you actually want is called C22, by that board's own README. The feedback burden is R1 on the UD2.7C and R3 on Marks' UD2.9.
So on anything that is not a UD2.7, read the seven lines above as functions and find each part by continuity. The hysteresis network runs in two parallel branches off the comparator's output: a DC one through the 100 k resistor, which is the one that comes out, and a pulse one through a resistor and the capacitor in series with it, which is the one that gets revalued. The table of which designator is which on which revision, with its sources, is on the UD boards.
What changes, and why each of them changes
The driver does the same four jobs it does on any coil: it finds the frequency, it fires early to make up for its own delay, it decides when a bang runs, and it stops when the current is too high. On a ramped coil each of those four changes, and one of them changes into something else entirely. The list above is what that comes to on the bench; this is why each line is on it.
Finding the frequency, while the frequency runs away
Every coil's frequency falls as the arc grows, because the arc adds capacitance. On a DRSSTC that happens over a few hundred microseconds and the feedback loop follows it without anybody thinking about it.
On a QCW it happens over twenty five milliseconds and it is enormous. The secondary can move by tens of per cent across one ramp. The driver has to track that the whole way up, which is why this department talks about the two poles so much: coupling splits the resonance in two, the driver sits on one of them, and on a QCW it has to sit on the upper one and stay there. Left alone, a coil can settle on the lower one.
There are three ways to hold it up there and only one of them is a change to the driver, which is the next section but one.
Which of the three your coil needs is measured, not assumed. loneoceans ran his first QCW on an unmodified UD2.7A, no oscillator and no PLL, and recorded at first light that the primary was set at turn 7.5, 392 kHz, "but coil oscillates itself to the upper pole", with the running frequency going from 465 kHz at the start of the ramp to 434 kHz at the top of it. The coil that the ramp's frequency page owns settles on the lower pole instead and has to be forced up. Find out which one yours is before you change the driver.
Firing early, while the target moves
The lead is set by an L and an R in the feedback path, and that network holds a constant angle. The hardware needs a constant time: the delays through the comparator, the logic and the transformer are fixed nanoseconds.
At one frequency you can make those agree. Across a ramp that sweeps by a sixth they drift apart by construction. It is the limit of the whole technique, and a QCW walks straight into it.
Deciding when to run: this is now two jobs
On a DRSSTC the interrupter says start and stop. On a QCW the same box also tells the buck converter what voltage to hold at each instant, and that instruction is the ramp.
So the box in that position is a modulator rather than an interrupter, and it has no ontime of its own: the bridge runs for exactly as long as the ramp lasts. Bangs per second drops from hundreds to five or seven, because a QCW run at two hundred is not a QCW, it is an explosion.
Which protection mode, and the word that means two things
A UD2.9X offers both, and the manual's own wording decides it. Ordinary OCD: the pulse ends and goes back to steady state until the next interrupter pulse. Pulse skip: it drops a single oscillation without killing the pulse completely.
On a DRSSTC pulse skip is the kinder of the two and the choice is not interesting. On a ramp both settings are failures, they are not symmetric, and which one you want depends on what your trips turn out to be. That is worked out with the arithmetic in the next section, including how far the losing case is from a sword.
So start with ordinary OCD and add pulse skip afterwards, if at all. The board and its wording are WaskaLabs' UD2.9X.
Which of the two, and why the order matters more than the choice
An overcurrent detector that ends the bang is right for a DRSSTC. On a ramp it is a disaster: cut in the middle and the arc never finishes growing, and what you get is an audible pop instead of a sword. That much is obvious, and it is where most conversions stop thinking, including an earlier version of this page.
The two behaviours have names, and a UD2.9X offers both. Ordinary OCD ends the pulse and returns to steady state until the next interrupter pulse, which on a ramp means until the next bang. Pulse skip drops a single oscillation of the bridge without killing the pulse, so the burst runs on.
On time it is not close. One cycle at the frequencies this machine runs is about two microseconds and a QCW burst is 25 ms, so a skipped cycle costs 0.008 per cent of the bang. An OCD trip halfway up the ramp costs the remaining 12.5 ms, which is half of it. Pulse skip is roughly six thousand times cheaper [derived, one period at 490 kHz against a 25 ms burst], and that ratio is the whole argument for fitting it.
On mode it is not close in the other direction. Pulse skip diagnoses nothing. It lets the burst continue through whatever caused the trip, and if the cause was the driver losing the upper pole, the bang finishes on the lower one. On this machine the upper pole runs 519.1 down to 463.3 kHz across the ramp and never approaches the 300 kHz where arcs stop growing as straight swords, while the lower pole starts at 317.0 kHz with no arc out, 5.7 per cent above that line [derived], and leaves the sword band before 1.5 m at every capacitance in the measured range. So the burst completes, and what it completes as is a branched arc.
So the order matters more than the choice. Start with ordinary OCD, because its failure is legible, and add pulse skip once you have found out what your trips actually are. If they are transients, the six thousand to one is real money. If they are the loop losing its pole, pulse skip converts a bang you would have noticed into one you would not.
Be careful with the designators
The good news is the other face of the same fact. The comparator core did not change from UD2.1 through 2.5 to 2.7; Ward wrote that the main logic and drive circuits are unchanged. So the recipe transfers legitimately between revisions and onto clones. What transfers is the logic, not the part numbers.
The one that is not on the list
Nothing above turns a DRSSTC into a QCW by itself, because the buck is not in the driver. The modulator is a separate converter with its own switch, its own choke and its own gate supply, and it is the department in one part.
Why the upper pole has to be forced at all, rather than preferred, is on the ramp's frequency page: with plain feedback this coil settles on the lower pole at both ends of a bang, so the changes above are the difference between the machine working and not.
What the driver does in general, on any coil, is four jobs on one board.
The QCW diagram labels its driver "driver and lead" for the reason in the second bullet, and gives the modulator a line of its own running up the outside to the buck.