A QCW is a coil with a converter bolted between its rectifier and its bridge, and everything the department is named for happens inside that converter. It raises the bus smoothly over six to twenty five milliseconds. That is the ramp, and the ramp is what turns a branching spark into a sword.
Why it is a whole extra converter
The obvious shortcut is to skip pulses instead: leave the bus alone and walk the current threshold up across the bang. It has been tried three times in public, by Steve Conner in 2011, by Steve Ward on the UD3, and by Chris Dickey (HVF 292). Nobody got a sword out of it.
A fourth attempt sits on the Chinese forum hvdiy and it is worth adding for where the idea comes from rather than for what it proves. 山猫 built one in 2017 and named its ancestry outright: it uses the pulse density modulation of high frequency induction heating supplies, "这就不用buck这个环节了，直接用逆变器的 控制电路调功就是了", this way the buck stage is not needed at all, you regulate power straight from the inverter's control circuit. His method is the same one as the other three, in one sentence: "把锯齿波接到驱动的电压比较器的基准电压的脚上", put the sawtooth on the reference pin of the driver's voltage comparator (hvdiy 40893).
And the thread stops there. Six photographs of the hardware, a controller he is pleased with, zero replies, and no later post from him. He states the aim, that inverter-side and buck-side regulation both exist to make the power rise on a slope, and never says what the arc did. So this is a fourth builder reaching for the scheme and a fourth outcome that did not get written down, which is not evidence that it works and is not quite evidence that it failed either.
What it does explain is why the idea keeps coming back. It is not a coil builder's invention being rediscovered; it is standard practice in induction heating, where PDM regulates power on series resonant inverters and does it well. People reach for it on that authority.
And the authority is on the same forum, two threads away, which is where 山猫 took it from. A reposted industry survey of how series resonant inverters have their power regulated splits the field in two (hvdiy 35888):
直流调功 DC side: change the DC input voltage
by phase-controlled rectifier, or by a chopper
逆变调功 inverter side: PFM, PDM, or phase shiftThe chopper is a buck, and the survey names its costs in the same breath as its virtues: high line power factor, fast voltage response, easy protection, "但由于 DC/DC变换环节的加入，电源的整机效率和可靠性将会降低", but because a DC/DC stage has been added, the whole supply's efficiency and reliability go down. That is a fair statement of what a QCW pays for its ramp, made by people who are not building Tesla coils.
And it defines PDM in a way that settles what the word should mean here. In some window there are N power output units; the inverter delivers into M of them and stops for the other N minus M, "负载能量以自然振荡的形式逐渐衰减", during which the load's energy decays away as free oscillation. The density is M over N. Note what that requires: the tank has to be allowed to ring down on its own between deliveries. A limiter that stops the bridge and restarts it on the next whole cycle is doing something else, which is why the driver page is careful that a cycle-synchronised limiter is not the PDM it gets called. The reason it does not transfer is on the driver page, and the distinction that matters most is that a limiter synchronised to whole cycles is not the true PDM it usually gets called.
The other shortcut is the mains, and it is the one people actually build. Take the rising quarter of the rectified mains and let it be the ramp: a staccato interrupter gates the coil on only while the sine is climbing, and there is no converter at all. It works, and the price is measurable in two places. The ramp is 4 to 5 ms because that is the rising quarter of a mains period, not because anybody chose it, and the arc that comes out of the best documented example of it is Zach Armstrong's 20 inches from a 5 inch tall secondary at 240 V into a dual-resonant primary (hackaday), which is four to one and is his own reading of it. The reference build's buck, on a ramp four times as long that it did choose, makes almost thirteen to one. That is what the converter buys, stated as a ratio rather than as an argument.
Two builds set that 4 to 5 ms in hardware, and neither treated it as a setting. Mads Barnkob's Kaizer DRSSTC IV, posted as a poor man's QCW, triggers on the rising edge of the 50 Hz mains and gives its interrupter a range of zero to 5000 µs (HVF 24). Gao's earlier R-SSTC 3 does the same job on the first quarter wave, with a staccato interrupter of zero to about 5 ms, which he notes on the page is just past a quarter of a mains period (loneoceans). One is the quarter of a 50 Hz sine to the microsecond and the other stops a little beyond it. The sine is doing the choosing in both.
And the third shortcut is a transistor in its linear region. Charge a MOSFET's gate through an RC and let its conduction rise: the drop across it falls, and what the coil sees is a ramp. One builder does exactly that with a one megohm pot and a tenth of a microfarad, and gets 20 cm of arc from a 48 V supply (kechuang). He reports the device barely warm without a heatsink at half a hertz, on the reasoning that the ramp is a small part of the period, and he makes the argument for it plainly: at that power the buck is harder and costlier to build, and its choke is not small either, so the converter does not obviously win on volume. He is right at 48 V and 20 cm. The whole of this page is about what happens when you are three orders of magnitude away from there, and a series pass element dissipating the difference stops being an option long before you arrive.
And rb_sama's own words are worth having, because this page has been quoting their conclusion in translation. On why the arc stops growing: the load rises and the arc's own capacitance detunes the pair, and "两者是电弧继续增长的最大敌人， 导致电弧会在特定系统中，无论输入多大功率，都无法增长", the two together are the greatest enemy of continued growth, so that in a given system the arc cannot grow no matter how much power you put in. And on why that makes the rise rate the thing to control: "而K是可以影响到电流上升率的，因为对于LC系统，Zo=sqrt（L/C）， 这个被称为特征阻抗", K affects the rate of current rise because for an LC system Zo = sqrt(L/C), the characteristic impedance, followed by the design rule in seven characters, "为了不让电弧分叉，必须让功率平缓的上升"*, to keep the arc from branching the power must rise gently.
His stated design targets, for anyone sizing a machine against them: above 3 to 400 kHz with an on-time above a millisecond, and an ordinary QCW putting out 6 to 80 kV at a peak power within 20 kW, which he attributes to measurements by builders outside China rather than to his own bench.
And it has now been run head to head against the buck on one machine, which is better evidence than three separate failures. abc555 built a QCW with both paths wired: a synchronous buck feeding the bus, and a fibre-optic input that could instead drive the skip-pulse current threshold as a ramp. On the same coil, at the same 7 ms, modulating the threshold gave an envelope that barely resembled a sawtooth and much less arc than modulating the bus; stretching it to 20 ms did not rescue it. He calls the scheme dead (kechuang). His own reading is that early in the burst the arc is short, little energy leaves, and energy coupled back from the secondary pushes the primary current over the threshold on its own, so the envelope stops being anything the threshold controls.
The reason given is that a branchless arc wants smooth continuous modulation of its power with very little ripple, and you cannot smooth the missing pulses out with the tank's own stored energy unless the tank is monstrously oversized. A buck converter is the reference for that smoothness. It also decouples the switching frequency and the energy store from the resonant tank, which is worth having on its own.
There is a harder reason underneath that one, and it is the best answer this corpus has found to why the ramp exists at all. rb_sama modelled the whole coupled system in LTspice and swept the arc as a load, and what comes out is that a growing arc attacks the machine twice over (kechuang). It loads the network more heavily, which drops the Q and therefore the gain; and its own capacitance grows with it, which walks both poles down in frequency and detunes the drive. His conclusion is blunt: those two together mean that in a given system the arc stops growing no matter how much power you put in.
So the ramp is not there to be gentle. It is there to climb a gain curve that is falling away underneath it. In his words the rise of the bus modulator levels the curve, and it does so across a usefully wide range. That is a simulation and not a measurement, and it is worth reading as a shape rather than as numbers, but it turns the buck from a nicety into the thing that pays for the arc's own growth.
The control loop that is not a loop
duty = V_out / V_inCompute it once per cycle from the measured input voltage and drive the switch with it. That is feedforward: no error amplifier, no compensation, nothing to oscillate. The accuracy is not good, and for a Tesla coil it does not need to be.
If you do close a loop, the choice of mode has a trap in it. abc555 worked through it and wrote the reasoning down (kechuang). Current mode needs slope compensation; slope compensation pushes the cycle by cycle current limit up at small duty, which is exactly where a QCW ramp starts; and with a UC3843, whose usual slope comes off the timing capacitor, a small choke leaves that slope too shallow to be worth having. He took voltage mode instead and paid for it in complexity, because voltage mode with cycle by cycle limiting is a larger circuit.
The limit itself is the part to copy. He set it at 30 A and reports that through the entire debug he never lost a transistor. rb_sama adds the reason it works so well here: the choke will not let its current step, so a short across the bridge downstream makes the buck current rise as a ramp rather than a wall, and a current transformer on the output has real time to act on it.
And the loop is worse than useless on the bench, not only on paper. alan sailer built a QCW closely on the reference design and says the buck driver's feedback was the single most frustrating part of it: he could not probe the circuit without destroying its behaviour, and it had to go into a completely shielded box before it would work at all. A circuit you cannot put a probe on is a circuit you cannot debug, which is a cost that never appears in the comparison between feedforward and feedback.
Four things about the ramp matter, and the repetition rate is not one of them. rb_sama, who built a QCW around this same comparator loop and ran the modulation through an STM8 of his own, lists what changes the arc (kechuang): the height of the starting step, the rising slope, the falling slope, and the peak level. And he says the repetition frequency barely matters, which is a sharp difference from an ordinary DRSSTC, where burst rate is one of the main handles. On a ramp the burst is long enough to be its own experiment, and what happens inside it is all there is.
The one refinement worth having is a quadratic term. davekni runs his QCW's buck open loop from an FPGA at a fixed 40 kHz with an IGBT one side and a diode the other, and ramps the duty almost linearly. There is a second machine on the same setting: ZakW's modulator is "an RP2040 commanding an open loop synchronous buck converter. There is no feedback, just an interrupt fired on every PWM cycle that computes a new value from basic ramp parameters. For now it's running at 58 kHz" (HVF 3097). Two builders, two microcontrollers, one asynchronous and one synchronous, 40 and 58 kHz, and both open loop with the duty computed per cycle rather than regulated. That is the closest thing to a norm this corpus has for the switching frequency, and it is two points rather than a rule. Linear was good enough. A small quadratic term on top of it compensates for the bank sagging as the burst empties it, and that is the one addition he recommends. He then replaced the quadratic with a full estimator, simulating the bank voltage from an estimated output current and a measured model of his own bridge's current against voltage, and reports no significant improvement over the simple quadratic. Worth knowing before building the estimator: the cheap correction gets almost all of it.
The choke decides everything
inductor ripple dI = V_in · D(1-D) / (L · f_pwm)
output ripple dV = dI / (8 · C · f_pwm)
so dV goes as 1/(L · C · f^2)Three knobs, and they do not cost the same:
- Double the inductance. Ripple halves, and so does the discontinuous threshold. Costs size, copper and saturation margin.
- Double the switching frequency. Ripple drops fourfold, the threshold halves. Costs switching loss and gate drive: average gate current is
Q_g · f, and where a two watt isolated supply runs out depends on the rail, not on the frequency alone. On the reference build's brick a split rail is past two watts by 30 kHz and a single +15/0 rail is not until about 42, and the rows are with the choke. - Double the capacitance. Ripple halves, threshold unchanged. Costs pennies.
Frequency looks like the best deal because it enters the ripple squared. It is the one with two prices.
The failure that catches everyone
When the inductor current falls to zero inside a chopping cycle the converter goes discontinuous, and a discontinuous buck does not follow its PWM. The gain rises above the duty cycle and starts depending on the load, and at nearly no load the output floats up towards the full bus at any duty at all.
And in one common controller it is not a failure at all. rb_sama's reading of the reference build's ping-pong comparator is that the converter is meant to sit in discontinuous conduction at light load and slide towards continuous as the load comes up, and that its switching frequency moving with output voltage is the thing that keeps the loop from latching fully on when the output power is large (kechuang). A fixed frequency integrator loses that behaviour. So whether the discontinuous start is a defect depends on what is controlling the switch: for a feedforward duty schedule it is the hole in the model, and for a hysteretic loop it is Tuesday.
The threshold is dI/2 and the cure is inductance. When you bench it, use a low resistance dummy load, ten ohms rather than thirty, or you will spend an afternoon chasing a nonlinearity the coil will never show you.
And the reference build disagrees with the warning above, which is worth knowing before designing around it. Gao met this on the bench as a visible kink in the ramp, at about 140 V into a 10 Ω load, matched its position against the critical-current formula and against an LTspice model, and then concluded that in real operation the coil draws enough that the converter is continuous almost from the beginning, so nothing needed doing about it (loneoceans).
The two positions are not as far apart as they look, and the gap between them is the load. His conclusion is about a coil already lit; the warning is about the window before it lights, when the bleeder is the only load there is. What neither of them settles is how long that window lasts on any given machine, and that is still the part you can only measure.
The second transistor, and what it buys
An asynchronous buck is one switch and a diode. A synchronous buck puts a second transistor where the diode was, turned on in antiphase with a dead time between them, and the reason usually given for that is efficiency. On a QCW it is not the reason.
A transistor conducts both ways and a diode does not. So the inductor current in a synchronous buck is allowed to go negative, the converter never falls out of continuous conduction whatever the load is doing, and the section above stops applying. Duty maps onto output voltage linearly from the first millisecond, and the open loop that has no business working works perfectly. That is Anders Mikkelsen's argument, and it is worth reading as a choice of topology rather than a refinement: the start of the ramp is where an asynchronous buck is always wrong, and it is also the part of the ramp you cannot calculate.
The asynchronous route to the same place is a choke large enough that the converter never leaves continuous conduction across the whole ramp. davekni takes it, with an FPGA and a fixed 40 kHz. One costs a driver and a dead time, the other costs copper and a larger core.
And almost nobody builds one. The argument above is sound and the hardware is not what gets built, which is worth saying plainly rather than leaving a reader to discover it. The reference QCW, Gao's QCW 1.5, is asynchronous on purpose and he says why in one line: "I have used a simple asynchronous buck converter topology due to its simplcity." The switch is an IGBT in a 300 A half-bridge module with the other device held open so that only its reverse diode is used, which is the trick this page describes two sections down, and it makes metre and a half arcs.
It has been run, and it worked. And twice, not once. The earlier of the two is Isopack's bus modulator from 2011 (isopack), two IGBT modules with the low side controlled from a microcontroller running hysteretic bounds, and the reason he gives for the second device is the one this page arrives at from the other end: "Q2 is essential because it allows the output capacitor to be discharged rapidly." It is a published design rather than a proved machine, and he says so himself, wondering whether a software-only loop can track the coil quickly enough.
The later one is finished. Anders Mikkelsen ramped a QCW open loop on a synchronous buck and reports good results, and the reason he gives is exactly the one above: the converter stays in continuous conduction whatever the coil happens to be drawing, so duty maps onto output voltage linearly and independently of load current, and open loop duty ramping then works. The second device did not need a discrete driver either, he used an integrated half-bridge driver with dead time generation, an NCV51563, so the complication he describes is one part rather than a subsystem. He moved on to APWM ramping shortly afterwards, which is why the synchronous buck is not the thing he is known for.
What has to be around it
A freewheel diode. An asynchronous buck does not run without one: when the switch opens the inductor current has nowhere to go. Fast, rated for the full current, and physically against the switch. Fins and air if it runs continuously.
A common trick is a half-bridge module used as a buck, top device switching and the bottom one left open purely for its body diode. Wasteful, convenient, and very common.
Gate drive sized for the brick, and it is more charge than it looks. A buck switch made of parallel devices presents 20 to 40 nF at the gate, which is a different problem from a single part. rb_sama drives 30 nF to a measured 200 ns rise and 150 ns fall at minus 9 and plus 15 V, and reports that with that drive the buck bridge stays cold at 20 kW of pulse power at one burst per second (kechuang). Cold at the peak rating is the sign the switching transitions are not where the loss is, and it is worth measuring rather than assuming.
A gate supply that knows where it sits. The buck's switch is a high-side device on the full bus, so its isolated gate supply carries the bus voltage across its barrier for as long as the machine is on. That makes the bus voltage a gate-drive decision and not only a power one: a 650 V bus stands across a 1 kV barrier at 0.65 of its rating, and the rejected alternative of raising the mains with an autotransformer to reach 424 V without a doubler would have stood at 0.42 [derived]. Two thirds of the barrier against two fifths of it, for as long as the machine is switched on. The reason that alternative was rejected is on the rectifier's page, and it is not the gate supply. It is that the bank's energy falls by a factor of 2.35 with it.
Bleeder resistors on the output. Without them the ramp does not come back down, because a buck can only add charge. Two of 2.2k at 200 W is the order of it. That same resistor is the converter's entire load until the arc lights.
The wick, and what it is really for
A shelf of about 40 V, so the arc is already alight when the voltage starts to climb. The height is the reference build's, the length is not. Gao sets his at about 40 V for roughly a millisecond, and the capture he publishes of a working burst puts the wick at under one, nearer 900 µs (loneoceans). The two milliseconds this corpus uses elsewhere, in the widget above and in its own machine's figures, is this corpus's own number and not his. Nobody has published what the length should be, or what it costs to get it wrong in either direction.
And there is a second reason for it, which is about the electrode rather than the air. rb_sama's account is that a coil tuned for a long arc is deliberately detuned at the start, so the terminal voltage during the first part of the ramp is low, and a low terminal voltage holds the arc back: you get the branching you were trying to avoid even though the ramp itself is clean. His fix is to put a small platform at the very start of the burst, which he describes as preheating the discharge point (kechuang). Same shelf, different mechanism: not only lighting the arc, but leaving heat at the tip so the ramp that follows has somewhere to grow from. He offers it explicitly as the safe alternative to the other way people get an arc started, which is a radioactive source at the breakout point.
Set it as a duty cycle, because it is not a voltage: the same duty on a 325 V bus and a 650 V bus is two different shelves. And it cannot be calculated, only measured, for the reason above. The converter is discontinuous exactly there, which is where the formula stops describing it.
Clamp it in the warm-up window as well as inside the ramp. The common omission is to limit it in the ramp calculation only, and then the bridge takes the shelf's power at zero amplitude and gets warm with nothing to show for it.
Three approaches, all of them working: the shelf before a linear ramp, an exponential start instead of a shelf, or self-oscillation and an exponential with no shelf at all. ZakW dropped the shelf and used a non-linear start, which does the same job without a corner in the curve, and he could drop it because his driver self-oscillates: the bridge starts on its own rather than waiting for feedback, so there is nothing to light in order to get it going.
Where the choke's energy goes when the burst ends
The detector fires, or the interrupter simply reaches the end of the flash, and the bridge stops drawing current. The choke does not stop. At the top of the ramp it is carrying 102 A and holding
½ · L · I² = ½ · 186 µH · 102² = 0.97 Jwhich has to go somewhere in the tens of microseconds it takes to decay. The bleeders are not it: two of 2.2k at 440 V take 0.4 A against the choke's hundred. So the energy lands in the output filter capacitor, and a film capacitor asked to absorb a joule it was not sized for does not survive it.
output with 25 µF with 40 µF with 60 µF
325 V rises to 428 to 392 to 371
440 V rises to 521 to 492 to 475The answer is a clamp diode from the buck's output up to the positive of the bank, so the choke's current returns to the bank instead of charging the filter. It is one part, it works, and the reference build says so in the words of somebody who met the problem:
in the event of a current trip event, the sudden turning off of the bridge causes the (large) residual current in the buck inductor to have nowhere to go, creating an over-voltage situation on the bus of the bridge. If this exceeds the IGBT voltage, it will cause IGBT failure with horrible results! This is clamped using a high speed high current rectifier back to the bus caps.
Gao, on QCW 1.5. Note what the part is: not a snubber, not a suppressor, a rectifier sized for the full current, and it goes back to the bus caps rather than to anything local.
What it then does, though, depends entirely on where the bank sits relative to the ramp's ceiling, and that is not a detail.
With the bank at the ramp's own voltage
Bank at 440 V, bridge devices rated 650 V, no doubler. The diode conducts on any overshoot at all, because the buck's output tops out at the bank. The joule goes home: on that arrangement's 12,000 µF bank at 440 V it is 0.08 per cent of what is already stored, and the filter capacitor sees a volt or two.
This is the arrangement the reference build is in. Its bus capacitor is a 10,000 µF part rated 400 V, so there is no doubler and the bank is the ceiling, which is exactly why a rectifier back to the bus caps is all the protection that section of his machine needs.
And when the clamp conducts, the bridge sees 440 V, which is what it sees at the top of every ramp anyway. No new failure. The device margin is 650 over 440, a factor of 1.48, against the rule of thumb of about a third.
And the larger prize is that the firmware ceiling stops being load-bearing. If the buck's switch fails short the bridge gets 440 V, which is the voltage it is built for. There is nothing left for a software limit to protect, because the bank became the limit.
With a doubler above the ceiling
Bank at 650 V, buck deliberately held to 440 so that 650 V devices have margin. Now the clamp is a second hole in that ceiling rather than a safety part. This corpus records it in three places as exactly that:
If the buck's switch fails short, or the clamp diode on the choke's energy return fires during overcurrent, the bridge gets the full bus and the margin is gone in an instant.
And the arithmetic says the diode will not even do its job here. Climbing the last 210 V from 440 to 650 takes 2.9 J at 25 µF where the choke has 0.97, so the diode never forward-biases in ordinary operation and the capacitor absorbs everything anyway. It is a hazard that is not earning its keep, and it only conducts in the cases nobody wanted.
Two things that belong to the rectifier and decide this anyway
Why there is a doubler at all. Not for voltage at the bridge, which the buck cuts back down, but for stored energy, since a bank holds ½CV² and that is what decides whether the ramp keeps its shape. It also starts the ramp cleanly, because a doubler pulls the bus to nearly nothing every cycle and leaves no residue between flashes, where half-wave supply leaves one and the arc branches at the start of the ramp on it. The bus page owns that argument.
And a bank of thousands of microfarads does not simply switch on. The inrush resistor goes on the AC side, before the rectifier, so it always sees the same mains peak and the peak inrush current does not depend on whether a doubler follows it. What does depend on it is the time: each of a doubler's capacitors is fed by its own diode for only half of the cycle, so the effective time constant is twice the ordinary R·C, and 60 Ω into 9900 µF goes from 0.59 s to about 1.19. Three seconds of relay delay that would have been generous behind a plain rectifier is not enough behind a doubler.
What the choice actually costs
The doubler is not there for voltage at the bridge, it is there for stored energy, and dropping it is paid for in capacitance. On the corpus's own figures, a 406 J flash against a 9900 µF bank:
bus 650 V bank 2091 J the flash eats 19 % holds its shape
bus 440 V bank 958 J the flash eats 42 % sags noticeablyForty two per cent is the edge past which a large bank has stopped being worth having. Buying that back means 21.6 mF at 440 V against 9.9 at 650 [derived, equal stored energy], and at 450 V rating rather than two 350 V parts in series. Better than twice the bank for the same joules, which is the whole cost of the lower bus.
bank 440, devices 650 clamp free and safe, no software ceiling to trust,
but the bank costs twice as much
bank 650, devices 650 cheap bank and a ramp that holds,
but the clamp becomes a second hole in the ceiling
bank 650, devices 1200 all of it works and the clamp is harmless,
paid for in switchesWhen the ramp comes out woolly
The arithmetic is in the choke section; this is what it looks like from the bench.
the ramp does not follow the PWM discontinuous choke current, raise L
the ramp is woolly, ripple visible L·C·f² too small, and f is worth twice L
the start is higher than calculated discontinuous at the start, the output
floats towards the bus, measure under load
the bridge warms at zero amplitude the shelf is clamped in the ramp only
the top of the ramp sags the bank is small or the supply is softFrequency is worth twice inductance because it enters the ripple squared, and it is the one knob with two prices, since the average gate current is Q_g · f and a two watt isolated supply runs out at a frequency set by the gate rail: on the reference build's 3.20 µC brick that is about 21 kHz on ±15 V and about 42 on a single +15/0, so the same module is either spent or comfortable at 30 kHz depending on a decision taken somewhere else (the rows). Capacitance is the only lever with nothing on the other side of it, and after the section above it has two jobs rather than one: it presses the ripple down and it swallows the choke's joule with less rise.
The detector ends the ramp, and that is the design
A QCW wants ordinary latching overcurrent and not pulse skip. On a ramp, "until the next interrupter pulse" means "until the next flash", so the detector gives a clean and predictable end to the burst, while skipping carries the burst through the event and into a machine whose bus voltage and pole structure have both moved underneath it. What that costs is worked through with a calculator.
The commonest reason a detector ends a ramp early is a tank capacitor that is too big. The current rises too fast, the threshold arrives halfway up, and instead of a sword you get a pop. The mistake in a QCW is a large MMC, not a small one.
What people actually build
| build | L | C | f_pwm | ripple at D = 0.5 | discontinuous below |
|---|---|---|---|---|---|
| Gao, QCW 1.5 | 113 µH | 28.8 µF | roams 16.5 to 31.9 | 42 A at 17 kHz | 21 A at 17 kHz |
| CJ | 100 µH | 40 µF | 25 kHz | 40 A | 20 A |
| gsch.labs | 210 µH | 13 µF | 60 kHz | 7.9 A | 4.0 A |
Each build name links the source its L, C and f_pwm come from. For CJ and for gsch.labs the three are verbatim. CJ gives his in a single reply, "My PWM modulation frequency is 25KHz, and the main filter LC is 40uF and 100uH", and gsch.labs lists his in the opening post of his own build thread, a "custom inductor used. (210uH)" with "output capacitor: 13uF" and "PWM frequency: 60kHz". Gao's three are qualified rather than quoted, in the way the note below sets out. The last two columns on every row are this page's own arithmetic on the first three and are not anything a builder published.
CJ's ripple is four times gsch.labs' and he has 2.4 metres of arc. Watch the discontinuous threshold, not the ripple.
The reference build sits almost exactly on CJ's numbers and neither of them is near gsch.labs', which is worth noticing before optimising the ripple: both of the long-arc machines run a ripple that looks careless on paper. Gao's stated filter corner of about 2.8 kHz comes back out of his own 113 µH and 28.8 µF at 2790 Hz, so the figures on that page are consistent with each other, which is not always true of published builds.
The ancestor, and the pin that decided whether it could work
Before anyone put a buck converter in front of a bridge, the modulator was a 555 making a sawtooth and a TL494 comparing against it. That circuit still circulates, and two people in the thread it comes from say plainly not to copy it. It is worth having anyway, because the reason it could or could not ramp to the top is a pin rather than a design skill.
The schematic itself cannot be checked from here, so which mode it used is not established. The check is the useful part and it survives: on any TL494 modulator, look at OUTPUT CTRL before you look at anything else.
Sizing the choke, step by step
Worked on one real core, and every step has a trap the general formulas above do not warn you about.
1. Which current the choke carries
Not the primary current. The 160 A in a QCW primary circulates between the MMC and the coil and never reaches the bus. The choke sees the average bus current:
I_choke = (2/pi) · I_primary = (2/pi) · 160 = 102 A
peak power = 325 V × 102 A = 33 kWThis is the commonest confusion in the subject: a quoted "150 A" can mean the bus current or the primary current, and everything downstream depends by a factor of two on which one it is. Gao's published QCW (loneoceans) gives 100 to 200 A as the usual QCW primary current rather than as a buck current, and this page's 160 A primary sits inside that band, so 102 A on the bus is not a guess.
2. The nameplate inductance is not the working one
Core: Magnetics 0078337A7, XFlux µ26. A_L 68 ± 8 % nH/T², A_e 678 mm², l_e 324 mm.
A powdered core does not saturate sharply, its permeability slides. The datasheet gives two points on that slide: 80 % of it left at 215 Oe, 50 % at 380 Oe.
H [Oe] = 0.4·pi · N · I / l_e[cm]| turns | L on the LCR (0 A) | H at 102 A | µ left | working L | ΔI at 22 kHz |
|---|---|---|---|---|---|
| 40 | 109 µH | 158 Oe | 89 % | 97 µH | 38.1 A |
| 60 | 245 µH | 237 Oe | 76 % | 186 µH | 19.9 A |
| 90 | 551 µH | 356 Oe | 54 % | 298 µH | 12.4 A |
| 108 | 793 µH | 427 Oe | 43 % | 341 µH | 10.8 A |
A ring that reads "800 µH" on the meter delivers 341 at 102 A. Wind for the inductance at working current, not for the number on the LCR.
And this is the axis the material is chosen on. A choke carrying a hundred amps of DC never reaches a saturation cliff before its permeability has halved, so what decides the powder is how much inductance it keeps under bias, which is why Anders names SiFe. Three families are argued over and the arguments talk past each other, because each is right on a different axis; that argument belongs with the choke rather than here.
3. Winding it, and what is published about that
Almost nothing, and this is the honest state of it rather than a gap in the reading. Builders publish turns and gauge and stop.
The one thing on record is Gao's, and it is useful. Sixty six turns of 14 AWG on the T300-2D, which he calls challenging to wind, and then this: the winding calculated out at 99 µH and measured 113.6 µH, which he puts down to imperfect winding. Fourteen per cent, at zero bias, from nothing but how the wire lay on the ring.
His 99 recomputes, and it is worth being exact about what that buys. A_L of 22.8 nH per turn squared is printed on his own page, twice the single height T300-2's 11.4 because the D is a double stack, and sixty six turns squared on that is 99.3 µH. So the arithmetic is ours and the input is his: this confirms he did his own sum correctly, not that the core is what he says it is. The fourteen per cent still stands on one builder's A_L and one builder's meter, which is the reason to measure your own ring rather than to trust the number.
Which is the practical warning to take from it. The catalogue number is not the working inductance because of bias, and it is not the wound inductance either, because of your hands. Both errors are of the same order and they run opposite ways: Gao's winding came out fourteen per cent high, and the bias on this page's own choke takes about a quarter off. They can partly hide each other rather than add up, and that is not an overlap to count on, because the sign of a winding error is whatever your hands made it. Measure the ring you actually wound, at the current you actually run.
4. Saturation is checked, but it is not what limits you
Computing B = L·I/(N·A_e) from the nameplate L is wrong: the datasheet gives the incremental permeability, the slope of the curve, while the flux is set by the chord, B/H. Only the bounds are honest:
B_high = mu0 · mu_i · H as if the material never saturated (overstated)
B_low = mu0 · mu_incr · H as if the chord equalled the slope (understated)| turns | B low | B high | headroom to 1.6 T |
|---|---|---|---|
| 60 | 0.47 T | 0.62 T | 2.60× |
| 108 | 0.48 T | 1.11 T | 1.44× |
| 156 | 1.60 T | the limit |
Even by the high bound the limit arrives only at 156 turns, and the working limit from falling permeability arrives far sooner. So the rule is: check the µ droop, and the B check passes on its own. The 1.6 T is not on the datasheet, it is the XFlux family value; the sheet gives only the magnetisation curve, and that is enough.
5. Copper is the limit, and the window is usually roomy
108 turns × 150 mm per turn (datasheet, 40 % fill) = 16.2 m of wire| wire | window used | R | P at peak | average at 15 % duty |
|---|---|---|---|---|
| 14 AWG | 5 % | 135 mΩ | 1404 W | 211 W |
| 10 AWG | 14 % | 54 mΩ | 553 W | 83 W |
| 7 AWG | 31 % | 27 mΩ | 275 W | 41 W |
| 4 AWG | 61 % | 13 mΩ | 137 W | 20 W |
The 4710 mm² window takes 7 AWG at about 31 per cent on 108 turns, so there is room and no reason to go thinner: the copper loss is an order of magnitude above the core loss. Every row is linear in the wire length, so a 60 turn winding is these figures times 0.56 [derived].
Gao wound 14 AWG, on 66 turns of a T300-2D (loneoceans), and it is the gauge that gets copied. At 102 A the table above puts that at 780 W of peak copper. He does not publish a temperature and neither page says the choke ran hot, so what the mismatch means is open: either his bus current was well under the 102 A this page works with, or that choke was a great deal hotter than these figures allow. Do not copy the gauge without settling which. Mathieu thm took the same 14 AWG onto the core pair Anders recommends above, two 0078912A7 at 32 turns for 116 µH (HVF 3132), and his coil is on this site's own wall at 193 cm off a 14.3 cm secondary. So the gauge travels further than the current it was chosen for.
6. Check DCM along the whole ramp, not at one point
The bus current climbs with the voltage: 40 V is 12.6 A, 162 V is 51 A, 325 V is 102 A. The DCM threshold moves with it, because ΔI depends on the duty. The margin is bus current over threshold:
| turns | 40 V | 80 V | 162 V | 244 V | 325 V |
|---|---|---|---|---|---|
| 60 (186 µH) | 2.7× | 2.9× | 3.4× | 4.1× | 5.1× |
| 90 (298 µH) | 4.4× | 4.7× | 5.5× | 6.6× | 8.2× |
| 108 (341 µH) | 5.0× | 5.4× | 6.3× | 7.5× | 9.4× |
(with the doubler, 650 V in, the worst case.)
The tight point is always the start of the ramp, and it is not a coincidence: the bus current is lowest there and there is no arc load yet. Check 40 V, not the middle.
What the doubler changes
Nothing at the start of the ramp, and that is not obvious. At small duty:
ΔI = V_in · D(1-D) / (L·f) and D = V_out / V_in
so at small D: ΔI ~= V_out / (L·f) the input cancels outThe ripple at the start of the ramp depends on the output voltage, not the input. A doubler raises the input twofold and halves the duty at the same time, and the two cancel.
What it moves is the top of the ramp. Without a doubler, at 325 V out the duty goes to 1, the switch is almost always closed and there is no ripple at all. With a doubler the duty is 0.5, which is the point of maximum ripple:
filter C | ΔV at the top | filter corner | f_pwm/corner |
|---|---|---|---|
| 20 µF, what is fitted | 11.3 V (3.5 %) | 2611 Hz | 8.4× |
| 25 µF | 9.0 V (2.8 %) | 2336 Hz | 9.4× |
| 40 µF | 5.6 V (1.7 %) | 1846 Hz | 11.9× |
| 60 µF | 3.8 V (1.2 %) | 1508 Hz | 14.6× |
The first row is this machine rather than a recommendation. It carries one 20 µF can between the minus and the far end of the choke, which is below every figure this section arrives at, and the top row is what that costs once the doubler is in: twice the ripple of the row in bold, for a part that costs pennies. It is the cheapest thing on the page to change and the only one that changes nothing else.
Capacitance fixes this, not turns. It presses ΔV down, leaves the DCM threshold alone, and costs pennies: the one lever in the whole exercise with no other side to it than a lower filter bandwidth, and there is bandwidth to spare, since a 25 ms ramp is happy with a few hundred hertz.
The figures here are from published builds and the arithmetic on them is ours. The rig on the QCW department page draws the buck as what is inside it, because the choke is the reason a QCW has a ramp at all.