A QCW coil has a buck converter between its rectifier and its bridge. The buck raises the bridge's bus smoothly over six to twenty five milliseconds, and that ramp is what turns a branching spark into a straight sword.
Why it is a whole extra converter
The obvious shortcut is to skip pulses instead: leave the bus alone and walk the current threshold up across the bang. It has been tried three times in public, by Steve Conner in 2011, by Steve Ward on the UD3, and by Chris Dickey (HVF 292). None of them got a sword out of it.
A fourth attempt is on the Chinese forum hvdiy, and it is interesting mainly for where the idea comes from. 山猫 built one in 2017 and named its origin: it uses the pulse density modulation of high frequency induction heating supplies, "这就不用buck这个环节了，直接用逆变器的 控制电路调功就是了", this way the buck stage is not needed at all, you regulate power straight from the inverter's control circuit. His method is the same as the other three, in one sentence: "把锯齿波接到驱动的电压比较器的基准电压的脚上", put the sawtooth on the reference pin of the driver's voltage comparator (hvdiy 40893).
The thread ends there. There are six photographs of the hardware, a controller he is pleased with, zero replies, and no later post from him. He states the aim, that inverter-side and buck-side regulation both exist to make the power rise on a slope, and never says what the arc did. It is a fourth builder trying the scheme, and this time the outcome was never written down. That is not evidence that it works, and not quite evidence that it failed.
It does explain why the idea keeps coming back. PDM is standard practice in induction heating, where it regulates power on series resonant inverters and does it well, and people pick it up on that reputation.
The source is on the same forum, two threads away, and 山猫 took the idea from there. A reposted industry survey of how series resonant inverters have their power regulated splits the field in two (hvdiy 35888):
直流调功 DC side: change the DC input voltage
by phase-controlled rectifier, or by a chopper
逆变调功 inverter side: PFM, PDM, or phase shiftThe chopper is a buck, and the survey lists its costs next to its advantages: high line power factor, fast voltage response, easy protection, "但由于 DC/DC变换环节的加入，电源的整机效率和可靠性将会降低", but because a DC/DC stage has been added, the whole supply's efficiency and reliability go down. That is a fair statement of what a QCW pays for its ramp, from people who are not building Tesla coils.
The survey also defines PDM, and the definition is a useful one to hold to. In some window there are N power output units. The inverter delivers into M of them and stops for the other N minus M, "负载能量以自然振荡的形式逐渐衰减", during which the load's energy decays away as free oscillation. The density is M over N. That requires the tank to ring down on its own between deliveries. A limiter that stops the bridge and restarts it on the next whole cycle is doing something else, and the driver page explains why a limiter synchronised to whole cycles is not the true PDM it usually gets called.
The second shortcut is the mains, and it is the one people actually build. Take the rising quarter of the rectified mains and use it as the ramp: a staccato interrupter gates the coil on only while the sine is climbing, and there is no converter at all. It works, and the cost shows up in two places. The ramp is 4 to 5 ms because that is the rising quarter of a mains period, not because anyone chose it. And the best documented example, Zach Armstrong's, gets 20 inches of arc from a 5 inch tall secondary at 240 V into a dual-resonant primary (hackaday), which is four to one by his own reading. The reference build's buck, on a ramp four times as long that it did choose, makes almost thirteen to one. That ratio is the case for the converter.
Gao's earlier R-SSTC 3 gets its 4 to 5 ms from the hardware rather than from a setting. It runs on the first quarter wave, with a staccato interrupter of zero to about 5 ms, which he notes on the page is just past a quarter of a mains period (loneoceans). It stops a little beyond the quarter, and the sine sets the length.
The third shortcut is a transistor in its linear region. Charge a MOSFET's gate through an RC and let its conduction rise: the drop across it falls, and the coil sees a ramp. One builder does exactly that with a one megohm pot and a tenth of a microfarad, and gets 20 cm of arc from a 48 V supply (kechuang). He reports the device barely warm without a heatsink at half a hertz, since the ramp is a small part of the period. His case for it is plain: at that power the buck is harder and costlier to build, and its choke is not small either, so the converter does not obviously win on volume. He is right at 48 V and 20 cm. The machines described here are three orders of magnitude bigger, and a series pass element burning off the difference stops being an option long before that.
A fourth shortcut, a boost stage, fails on topology before it gets to results. davekni, asked directly why not a boost stage instead, gives the reason in one line: a pure boost converter, as opposed to a boost and buck combination, has a minimum output voltage equal to its input. A QCW ramp starts at essentially nothing, so a boost stage cannot make the beginning of one at all. His second reason is separate and is about the switch. With a reasonably large filter inductor a buck's switch carries a peak only a little above the output current, while a boost's carries the larger input current.
rb_sama's original wording is below, since his conclusion is quoted in translation further down. On why the arc stops growing: the load rises and the arc's own capacitance detunes the pair, and "两者是电弧继续增长的最大敌人， 导致电弧会在特定系统中，无论输入多大功率，都无法增长", the two together are the greatest enemy of continued growth, so that in a given system the arc cannot grow no matter how much power you put in. On why that makes the rise rate the thing to control: "而K是可以影响到电流上升率的，因为对于LC系统，Zo=sqrt（L/C）， 这个被称为特征阻抗", K affects the rate of current rise because for an LC system Zo = sqrt(L/C), the characteristic impedance. Then the design rule, in seven characters, "为了不让电弧分叉，必须让功率平缓的上升"*, to keep the arc from branching the power must rise gently.
His stated design targets, for anyone sizing a machine against them: above 3 to 400 kHz with an on-time above a millisecond, and an ordinary QCW putting out 6 to 80 kV at a peak power within 20 kW, which he attributes to measurements by builders outside China rather than to his own bench.
Threshold modulation has also been run against the buck on one machine, which is better evidence than three separate failures. abc555 built a QCW with both paths wired: a synchronous buck feeding the bus, and a fibre-optic input that could instead drive the skip-pulse current threshold as a ramp. On the same coil, at the same 7 ms, modulating the threshold gave an envelope that barely resembled a sawtooth and much less arc than modulating the bus. Stretching it to 20 ms did not help. He calls the scheme dead (kechuang). His explanation is that early in the burst the arc is short and little energy leaves, so energy coupled back from the secondary pushes the primary current over the threshold on its own, and the threshold stops controlling the envelope.
The usual reason given is that a branchless arc wants smooth continuous modulation of its power with very little ripple. You cannot smooth the missing pulses out with the tank's own stored energy unless the tank is monstrously oversized. A buck converter is the reference for that smoothness. It also separates the switching frequency and the energy store from the resonant tank, which is useful in itself.
There is a deeper reason, and it is the best explanation we have found for why the ramp exists at all. rb_sama modelled the whole coupled system in LTspice and swept the arc as a load, and found that a growing arc hits the machine in two ways (kechuang). It loads the network more heavily, which drops the Q and therefore the gain. And its own capacitance grows with it, which pulls both poles down in frequency and detunes the drive. His conclusion is blunt: together those mean that in a given system the arc stops growing no matter how much power you put in.
On this reading the ramp exists to climb a gain curve that is falling away underneath it, more than to be gentle. In his words the rise of the bus modulator levels the curve, and it does so across a usefully wide range. That is a simulation, not a measurement, and the shape matters more than the numbers. But it makes the buck what pays for the arc's growth.
The same model says why the rise has to be gentle and not just present. Coupling sets the characteristic impedance Zo = sqrt(L/C), and that governs how fast the primary current can rise. Raise it faster than the arc grows and the arc branches instead of extending. That matches what the shape of the ramp says, reached from the impedance side rather than from the arc's.
The control loop that is not a loop
duty = V_out / V_inCompute it once per cycle from the measured input voltage and drive the switch with it. That is feedforward: no error amplifier, no compensation, nothing to oscillate. The accuracy is poor, and a Tesla coil does not need better.
If you do close a loop, the choice of mode has a trap in it. abc555 worked through it and wrote the reasoning down (kechuang). Current mode needs slope compensation. Slope compensation pushes the cycle by cycle current limit up at small duty, which is where a QCW ramp starts. And with a UC3843, whose usual slope comes off the timing capacitor, a small choke leaves that slope too shallow to be any use. He took voltage mode instead and paid for it in complexity, because voltage mode with cycle by cycle limiting is a larger circuit.
His current limit is the part to copy. He set it at 30 A and reports that through the entire debug he never lost a transistor. rb_sama adds why it works so well here: the choke will not let its current step, so a short across the bridge downstream makes the buck current rise as a ramp rather than a wall, and a current transformer on the output has real time to act on it.
Closing a loop around primary current instead of bus voltage has been tried, and it is hard for a different reason than the one usually given. Steve Ward puts the ninety degrees of lag on the high Q case, where a constant input voltage would give a current growing without bound. Real coils, he says, sit on the other side of that: "the Q is relatively low, so the primary current tends to reach its final value within just a few cycles", and the lag comes out somewhat less than ninety. The extra delay is real, but the margin is not gone. What is on the record is the result. He ran it on the UD3 and "couldn't get any good sword sparks to happen".
There is a closed-loop answer to bank sag, and it is why some builders keep the loop. rb_sama reports that closing the comparator loop removes the waveform distortion the sagging bank causes, without anything being modelled or compensated. The loop simply follows the reference down as the bank falls away (kechuang). That gives bank sag two answers: an open loop that predicts it, and a closed one that doesn't have to. The next paragraph is the cost of the closed one.
The loop can also be a real problem on the bench. alan sailer built a QCW closely on the reference design and says the buck driver's feedback was the single most frustrating part of it. He could not probe the circuit without destroying its behaviour, and it had to go into a completely shielded box before it would work at all. A circuit you cannot put a probe on is a circuit you cannot debug, and that cost never shows up when people compare feedforward with feedback.
rb_sama, who built a QCW around this same comparator loop and ran the modulation through an STM8 of his own, lists four things about the ramp that change the arc (kechuang): the height of the starting step, the rising slope, the falling slope, and the peak level. He says the repetition frequency barely matters, which is a sharp difference from an ordinary DRSSTC, where burst rate is one of the main controls. On a ramp the burst is long enough to be its own experiment, and what happens inside it is what counts.
The one refinement to add is a quadratic term. davekni runs his QCW's buck open loop from an FPGA at a fixed 40 kHz with an IGBT on one side and a diode on the other, and ramps the duty almost linearly. A second machine uses the same approach. ZakW's modulator is "an RP2040 commanding an open loop synchronous buck converter. There is no feedback, just an interrupt fired on every PWM cycle that computes a new value from basic ramp parameters. For now it's running at 58 kHz" (HVF 3097). That is two builders, two microcontrollers, one asynchronous and one synchronous, 40 and 58 kHz, and both open loop with the duty computed per cycle rather than regulated. It is the closest thing to a norm we have for the switching frequency, and it is two data points, not a rule. Linear was good enough for davekni. A small quadratic term on top of it compensates for the bank sagging as the burst empties it, and that is the one addition he recommends. He later replaced the quadratic with a full estimator, simulating the bank voltage from an estimated output current and a measured model of his own bridge's current against voltage, and reports no significant improvement over the simple quadratic. So before building an estimator, know that the cheap correction gets almost all of the benefit.
The choke decides everything
inductor ripple dI = V_in · D(1-D) / (L · f_pwm)
output ripple dV = dI / (8 · C · f_pwm)
so dV goes as 1/(L · C · f^2)Running that relation backwards looks as though it identifies the machines, but it doesn't. Solve it for V_in at D = 0.5 against the three builds tabulated further down and it returns 400 V for CJ, 398 for gsch.labs and 323 for Gao's QCW 1.5 [derived]. None of those is a measurement. The ripple column it inverts is our own arithmetic on an assumed bus, so the round trip just returns the assumption, and the rounding gives it away. 400 V gives CJ 40.00 A and comes back 400. 400 V gives gsch.labs 7.94 A, which the table prints as 7.9 and comes back 398. 325 V gives Gao 42.30 A, printed as 42, and comes back 323 [derived]. Where a bus voltage is on the record it matches none of them. Gao's own page gives his 10,000 µF bus "charged up to 340V", and a capture of it "charged till 397V, dropped to 326V after one pulse" (loneoceans), and the records wall has CJ at 420 V. The ripple column is an assumption, not what any of them ran.
There are three knobs, and they do not cost the same:
- Double the inductance. Ripple halves, and so does the discontinuous threshold. Costs size, copper and saturation margin.
- Double the switching frequency. Ripple drops fourfold, the threshold halves. Costs switching loss and gate drive: average gate current is
Q_g · f, and where a two watt isolated supply runs out depends on the rail, not on the frequency alone. On the reference build's brick a split rail is past two watts by 30 kHz and a single +15/0 rail is not until about 42, and the rows are with the choke. - Double the capacitance. Ripple halves, threshold unchanged. Costs pennies.
Frequency looks like the best deal because it enters the ripple squared, but it is the one with two costs.
The failure that catches everyone
When the inductor current falls to zero inside a chopping cycle the converter goes discontinuous, and a discontinuous buck does not follow its PWM. The gain rises above the duty cycle and starts depending on the load, and at nearly no load the output floats up towards the full bus at any duty at all.
With one common controller this is intended behaviour. rb_sama's reading of the reference build's ping-pong comparator is that the converter is meant to sit in discontinuous conduction at light load and slide towards continuous as the load comes up. Its switching frequency moving with output voltage is what keeps the loop from latching fully on when the output power is large (kechuang). A fixed frequency integrator loses that behaviour. Whether the discontinuous start is a defect depends on what controls the switch. For a feedforward duty schedule it is a hole in the model, and for a hysteretic loop it is normal operation.
The threshold is dI/2 and the cure is inductance. When you bench it, use a low resistance dummy load, ten ohms rather than thirty, or you will spend an afternoon chasing a nonlinearity the coil will never show you.
The reference build disagrees with the warning above. Gao saw this on the bench as a visible kink in the ramp, at about 140 V into a 10 Ω load, matched its position against the critical-current formula and against an LTspice model, and concluded that in real operation the coil draws enough that the converter is continuous almost from the beginning, so nothing needed doing about it (loneoceans).
The two positions are closer than they look, and the difference is the load. His conclusion is about a coil already lit. The warning is about the window before it lights, when the bleeder is the only load. Neither says how long that window lasts on a given machine, and you can only find that out by measuring.
The second transistor, and what it buys
An asynchronous buck is one switch and a diode. A synchronous buck puts a second transistor where the diode was, turned on in antiphase with a dead time between them. The usual reason given is efficiency, but on a QCW the reason is different.
A transistor conducts both ways and a diode does not. So the inductor current in a synchronous buck can go negative, the converter never falls out of continuous conduction whatever the load is doing, and the previous section no longer applies. Duty maps onto output voltage linearly from the first millisecond, and an open loop that would otherwise be shaky works perfectly. That is Anders Mikkelsen's argument for the topology. The start of the ramp is where an asynchronous buck is always wrong, and it is also the part of the ramp you cannot calculate.
The asynchronous route to the same place is a choke large enough that the converter never leaves continuous conduction across the whole ramp. davekni takes it, with an FPGA and a fixed 40 kHz. One costs a driver and a dead time, the other costs copper and a larger core.
The second transistor also runs the converter backwards, which matters further down. It can push the choke's stored energy and the filter capacitor's charge back into the bank instead of leaving them to be absorbed or burned. That is the same property that puts a synchronous buck, alongside a resistor, on the list of ways to bring the output back down.
The reference builder's own next machine has no buck at all. Gao's QCW 2 (loneoceans) drops the converter and drives the bridge with phase shift instead, in his words to eliminate the bus modulator front end, and he names the price straight away: "at the cost of increased drive complexity and hard switching." He also shrank the machine to match, 60 A peak primary against 160 on the machine described here, on about 340 V of bus, and got roughly two feet of spark from a 2.4 inch secondary. His thermal check afterwards found the secondary the hottest part at over 60 °C with the power electronics cold.
That puts the buck in perspective. It is what you build when the current is too large to afford hard switching. Drop the current by a factor of nearly three and the calculation changes, the converter comes out, and the complexity moves into the drive. He does not say which he would recommend, and with two machines built he does not need to. A second converter-free machine, from a bilibili video, is sometimes quoted alongside it, but its bus voltage, bridge part, primary peak, shunt scaling and arc length were all read off the video. No schematic went with it and none of those five numbers is stated anywhere that can be checked, so it is left out. Gao's QCW 2 is published in writing.
Very few builders use the synchronous buck, even though the argument for it is sound. The reference QCW, Gao's QCW 1.5, is asynchronous on purpose and he says why in one line: "I have used a simple asynchronous buck converter topology due to its simplcity." The switch is an IGBT in a 300 A half-bridge module with the other device held open so that only its reverse diode is used, the trick described two sections down, and it makes metre and a half arcs.
It has been run, and it worked, twice. The earlier of the two is Isopack's bus modulator from 2011 (isopack), two IGBT modules with the low side controlled from a microcontroller running hysteretic bounds. The reason he gives for the second device comes at it from the other end: "Q2 is essential because it allows the output capacitor to be discharged rapidly." It is a published design rather than a proven machine, and he says so himself, wondering whether a software-only loop can track the coil quickly enough.
The later one is finished. Anders Mikkelsen ramped a QCW open loop on a synchronous buck and reports good results, for the reason above: the converter stays in continuous conduction whatever the coil happens to be drawing, so duty maps onto output voltage linearly and independently of load current, and open loop duty ramping then works. The second device did not need a discrete driver either. He used an integrated half-bridge driver with dead time generation, an NCV51563, so the extra complication is one part rather than a subsystem. He moved on to APWM ramping shortly afterwards, which is why the synchronous buck is not what he is known for.
The synchronous buck has been tested and it works, and it is still not what gets built. It removes the discontinuous start and it returns the choke's energy without a clamp. The reference build weighed a second device carrying a hundred amps, with its own isolated supply and a dead time in the power path, and chose the diode anyway.
That same build had a long run of trouble with its buck, but it is not an argument against the topology. The trouble was noise picked up by the feedback circuitry and a comparator chosen on a wrong specification, and both were found and fixed. Keep the two apart, because "the buck was unstable" is the kind of memory that gets attached to whatever buck topology happened to be in use.
What has to be around it
A freewheel diode. An asynchronous buck does not run without one: when the switch opens the inductor current has nowhere to go. Fast, rated for the full current, and physically against the switch. Fins and air if it runs continuously.
A common trick is a half-bridge module used as a buck, top device switching and the bottom one left open purely for its body diode. Wasteful, convenient, and very common.
Gate drive sized for the brick. It is more charge than it looks. A buck switch made of parallel devices presents 20 to 40 nF at the gate, which is a different problem from a single part. rb_sama drives 30 nF to a measured 200 ns rise and 150 ns fall at minus 9 and plus 15 V, and reports that with that drive the buck bridge stays cold at 20 kW of pulse power at one burst per second (kechuang). Cold at the peak rating means the switching transitions are not where the loss is. Measure it on your own build.
That capacitance is the one kechuang figure here that can be checked without opening kechuang. The reference build's buck switch is a single FF300R12KS4, and Infineon's datasheet for it gives its input capacitance as 20.0 nF at 1 MHz with VCE = 25 V and VGE = 0 V, with QG = 3.20 µC over a -15 V to +15 V swing. So the bottom of rb_sama's bracket is one real brick and the top of it is two in parallel. His minus 9 and plus 15 is also within a volt of the rail Gao runs, "conventional +15 -8V drive voltages" (loneoceans). The gate supply is sized on the charge, not the capacitance, and it is worked from that 3.20 µC.
A gate supply rated for where it sits. The buck's switch is a high-side device on the full bus, so its isolated gate supply carries the bus voltage across its barrier for as long as the machine is on. That makes the bus voltage a gate-drive decision as well as a power one. A 650 V bus stands across a 1 kV barrier at 0.65 of its rating. The rejected alternative, raising the mains with an autotransformer to reach 424 V without a doubler, would have stood at 0.42 [derived]. That is two thirds of the barrier against two fifths of it, for as long as the machine is switched on. The alternative was rejected for a different reason, given on the rectifier's page: the bank's energy falls by a factor of 2.35 with it.
Bleeder resistors on the output. Without them the ramp does not come back down, because a buck can only add charge. Two of 2.2k at 200 W is the order of it. That same resistor is the converter's entire load until the arc lights.
The idea itself did not start with a buck. The same thread opens with the lineage: QCW "原理最早是由半波调制的VTTC电弧推演而来", the principle was first worked out from the half-wave modulated arc of a VTTC. A vacuum tube rectifies on its own, "当交流电加在阳极上时，不超过其击穿电压，就只 允许正弦波的正半波通过", when AC is put on the anode and stays under its breakdown voltage only the positive half of the sine gets through, and "所以能够 观察到VTTC的电弧会形成剑一样笔直的形状", so a VTTC's arc is seen to take a shape as straight as a sword. Then "而Steve ward使用BUCK方式，对SSTC母线进行供电，成功实现 VTTC电弧效果", Steve Ward used a buck to feed an SSTC's bus and reproduced the VTTC arc.
The tube got the shape for free from its own rectification, and the buck ramp is a paid-for copy of that accident. It also suggests why the envelope matters more than the power: the machine that did it first had very little power.
The shape of the fall is a known complaint. rb_sama, analysing the reference build's comparator loop, reports a strange tail on the falling output and does not explain it (kechuang). novakon answers in one line that with asynchronous rectification into too light a load the tail is simply what happens. That is a third argument for the second transistor, after continuous conduction and returning the choke's joule. A switch on the low side is the only thing that makes the output follow its reference down as well as up, whatever the load. A builder saw it as a waveform before anyone made it an argument.
The wick, and what it is really for
The wick is a shelf of about 40 V at the start of the burst, so the arc is already alight when the voltage starts to climb. The height comes from the reference build, the length does not. Gao sets his at about 40 V for roughly a millisecond, and the capture he publishes of a working burst puts the wick at under one, nearer 900 µs (loneoceans). The two milliseconds used elsewhere here, in the widget above and in our own machine's figures, is our number and not his. No one has published what the length should be, or what it costs to get it wrong in either direction.
There is a second reason for it, to do with the electrode. rb_sama's account is that a coil tuned for a long arc is deliberately detuned at the start, so the terminal voltage during the first part of the ramp is low, and a low terminal voltage holds the arc back. You get the branching you were trying to avoid even though the ramp itself is clean. His fix is a small platform at the very start of the burst, which he describes as preheating the discharge point (kechuang). It is the same shelf with a different mechanism: besides lighting the arc, it leaves heat at the tip so the ramp that follows has somewhere to grow from. He offers it as the safe alternative to the other way people get an arc started, a radioactive source at the breakout point.
Set the shelf as a duty cycle, not a voltage, because the same duty on a 325 V bus and a 650 V bus gives two different shelves. It can only be measured, not calculated, for the reason above: the converter is discontinuous exactly there, which is where the formula stops describing it.
Clamp it in the warm-up window as well as inside the ramp. The common omission is to limit it in the ramp calculation only, and then the bridge takes the shelf's power at zero amplitude and gets warm with nothing to show for it.
Three approaches all work: the shelf before a linear ramp, an exponential start instead of a shelf, or self-oscillation and an exponential with no shelf at all. ZakW dropped the shelf and used a non-linear start, which does the same job without a corner in the curve. He could drop it because his driver self-oscillates. The bridge starts on its own rather than waiting for feedback, so there is nothing to light to get it going.
The shelf may do one more thing. This part is our reasoning, not a measurement. At 40 V the arc is barely there, so the secondary is barely loaded, and that is where the two poles are furthest apart, 202 kHz on this coil. The frequency at that moment tells you without ambiguity which pole the driver captured. Later in the ramp both poles have come down and closed up, and the same reading no longer tells you. That makes the shelf also the one window in the burst where you can check the capture. That is a different claim from saying it helps the capture happen, and only the first one is ours to make.
Where the choke's energy goes when the burst ends
The detector fires, or the interrupter reaches the end of the flash, and the bridge stops drawing current. The choke does not stop. At the top of the ramp it is carrying 102 A and holding
½ · L · I² = ½ · 186 µH · 102² = 0.97 Jwhich has to go somewhere in the tens of microseconds it takes to decay. The bleeders can't take it: two of 2.2k at 440 V take 0.4 A against the choke's hundred. The energy lands in the output filter capacitor, and a film capacitor asked to absorb a joule it was not sized for will fail.
output with 25 µF with 40 µF with 60 µF
325 V rises to 428 to 392 to 371
440 V rises to 521 to 492 to 475This is not only the overcurrent case. Unless the duty is walked back down before the bridge is stopped, the same dump happens at the end of every flash. The detector only makes it arrive at an arbitrary point on the ramp instead of the designed one. Ramping the duty down first costs firmware and no hardware, and it removes the ordinary case entirely.
The fix is a clamp diode from the buck's output up to the positive of the bank, so the choke's current returns to the bank instead of charging the filter. It is one part, it works, and the reference build describes it in the words of someone who met the problem:
in the event of a current trip event, the sudden turning off of the bridge causes the (large) residual current in the buck inductor to have nowhere to go, creating an over-voltage situation on the bus of the bridge. If this exceeds the IGBT voltage, it will cause IGBT failure with horrible results! This is clamped using a high speed high current rectifier back to the bus caps.
Gao, on QCW 1.5. The part is a rectifier sized for the full current, not a snubber or a suppressor, and it goes back to the bus caps rather than to anything local.
What it does after that depends on where the bank sits relative to the ramp's ceiling, and that matters a lot.
With the bank at the ramp's own voltage
Bank at 440 V, bridge devices rated 650 V, no doubler. The diode conducts on any overshoot at all, because the buck's output tops out at the bank. The joule goes back to the bank: on that arrangement's 12,000 µF bank at 440 V it is 0.08 per cent of what is already stored, and the filter capacitor sees a volt or two.
The bank size is not a free choice, and the ramp sets it. A 25 ms ramp to 440 V takes about 495 J out of the bank across one burst, which is the shape page's figure for that window rather than a second calculation. That is a different current from the 102 A above, which is the bus current at 325 V. The same load model puts 138 A at the top of a 440 V ramp. Holding the bus above 325 V through that needs a little over 11,000 µF, which is where the 12,000 comes from, not a catalogue. Published machines show the same thing. Gao's 275 J flash sits on 10,000 µF and he still runs into the bank, in his own words "Maximum ramp is just over 300V before my bus cap (charged to ~380+V) drops too low". The other side of it, a ramp going soft because it was stretched, is on his earlier machine and its smaller bus: a 14 ms ramp to 300 V at which "our bus capacitor runs out of juice" on 3400 µF (loneoceans). If the ramp goes flat at the top when you did not ask it to, check the bank before the converter.
The reference build is set up this way. Its bus capacitor is a 10,000 µF part rated 400 V, so there is no doubler and the bank is the ceiling. That is why a rectifier back to the bus caps is all the protection that part of his machine needs.
When the clamp conducts, the bridge sees 440 V, which it sees at the top of every ramp anyway. There is no new failure. The device margin is 650 over 440, a factor of 1.48.
The bigger gain is that the firmware ceiling no longer carries any of the protection. If the buck's switch fails short the bridge gets 440 V, which is the voltage it is built for. The bank is the limit, so a software limit has nothing left to protect.
With a doubler above the ceiling
Bank at 650 V, buck deliberately held to 440 so that 650 V devices have margin. Now the clamp is a second hole in that ceiling rather than a safety part. Three pages on this site already describe it that way:
If the buck's switch fails short, or the clamp diode on the choke's energy return fires during overcurrent, the bridge gets the full bus and the margin is gone in an instant.
The arithmetic also says the diode will not do its job here. Climbing the last 210 V from 440 to 650 takes 2.9 J at 25 µF where the choke has 0.97, so the diode never forward-biases in ordinary operation and the capacitor absorbs everything anyway. It adds a hazard for no benefit, and it only conducts in the cases you don't want.
Two things that belong to the rectifier and decide this anyway
Why there is a doubler at all. It is there for stored energy rather than voltage at the bridge, which the buck cuts back down anyway. A bank holds ½CV², and that decides whether the ramp keeps its shape. A doubler also starts the ramp cleanly, because it pulls the bus to nearly nothing every cycle and leaves no residue between flashes. A half-wave supply leaves one, and the arc branches on it at the start of the ramp. The bus page owns that argument.
Inrush. A bank of thousands of microfarads does not simply switch on. The inrush resistor goes on the AC side, before the rectifier, so it always sees the same mains peak, and the peak inrush current does not depend on whether a doubler follows it. The time does. Each of a doubler's capacitors is fed by its own diode for only half of the cycle, so the effective time constant is twice the ordinary R·C, and 60 Ω into 9900 µF goes from 0.59 s to about 1.19. Three seconds of relay delay that would have been generous behind a plain rectifier is not enough behind a doubler.
What the choice actually costs
Since the doubler is there for stored energy, dropping it costs capacitance. On our own figures, a 406 J flash against a 9900 µF bank:
bus 650 V bank 2091 J the flash eats 19 % holds its shape
bus 440 V bank 958 J the flash eats 42 % sags noticeablyForty two per cent is past the point where a large bank is still doing its job. Getting that back means 21.6 mF at 440 V against 9.9 at 650 [derived, equal stored energy], at 450 V rating rather than two 350 V parts in series. More than twice the bank for the same joules is the cost of the lower bus.
The 350 V part is the one option not taken here, and davekni calls it the best. In the same thread davekni gives his reasoning for the bank: a QCW needs large bulk capacitance to store the ramp's energy, cost per joule for electrolytics is higher at low voltage, and he puts about 350 V as the optimum for cost against energy and other parameters. Every bank we have seen is 450 V. The two are not necessarily answering the same question, since a part rating is chosen against a bus target and no bus target is stated beside his figure. Still, the cost argument runs the other way from the practice.
bank 440, devices 650 clamp free and safe, no software ceiling to trust,
but the bank costs twice as much
bank 650, devices 650 cheap bank and a ramp that holds,
but the clamp becomes a second hole in the ceiling
bank 650, devices 1200 all of it works and the clamp is harmless,
paid for in switchesWe have not measured any of the three, and the percentages and the 21.6 mF are our arithmetic on somebody else's 406 J and 9900 µF. The shape of the choice does not depend on the arithmetic: a clamp to the bank is free when the bank is the ceiling and dangerous when the bank is above it.
When the ramp comes out woolly
The arithmetic is in the choke section. This is what it looks like on the bench.
the ramp does not follow the PWM discontinuous choke current, raise L
the ramp is woolly, ripple visible L·C·f² too small, and f is worth twice L
the start is higher than calculated discontinuous at the start, the output
floats towards the bus, measure under load
the bridge warms at zero amplitude the shelf is clamped in the ramp only
the top of the ramp sags the bank is small or the supply is softFrequency counts twice as much as inductance because it enters the ripple squared. It also has a second cost, since the average gate current is Q_g · f and a two watt isolated supply runs out at a frequency set by the gate rail. On the reference build's 3.20 µC brick that is about 21 kHz on ±15 V and about 42 on a single +15/0, so at 30 kHz the same module is either used up or comfortable depending on a decision made elsewhere (the rows). Capacitance is the only lever with no downside, and after the section above it has two jobs: it presses the ripple down and it swallows the choke's joule with less voltage rise.
The detector ends the ramp, and that is the design
A QCW wants ordinary latching overcurrent and not pulse skip. On a ramp, "until the next interrupter pulse" means "until the next flash", so the detector gives a clean and predictable end to the burst. Skipping carries the burst through the event and into a machine whose bus voltage and pole structure have both moved underneath it. What that costs is worked through with a calculator.
The commonest reason a detector ends a ramp early is a tank capacitor that is too big. The current rises too fast, the threshold arrives halfway up, and instead of a sword you get a pop. In a QCW the usual mistake is a large MMC, not a small one.
What people actually build
| build | L | C | f_pwm | ripple at D = 0.5 | discontinuous below |
|---|---|---|---|---|---|
| Gao, QCW 1.5 | 113 µH | 28.8 µF | roams 16.5 to 31.9 | 42 A at 17 kHz | 21 A at 17 kHz |
| CJ | 100 µH | 40 µF | 25 kHz | 40 A | 20 A |
| gsch.labs | 210 µH | 13 µF | 60 kHz | 7.9 A | 4.0 A |
Each build name links the source its L, C and f_pwm come from. For CJ and for gsch.labs the three are verbatim. CJ gives his in a single reply, "My PWM modulation frequency is 25KHz, and the main filter LC is 40uF and 100uH", and gsch.labs lists his in the opening post of his own build thread, a "custom inductor used. (210uH)" with "output capacitor: 13uF" and "PWM frequency: 60kHz". Gao's three need qualifying, as explained below. The last two columns on every row are our arithmetic on the first three, not anything a builder published.
CJ's ripple is four times gsch.labs' and he has 2.4 metres of arc. Watch the discontinuous threshold, not the ripple.
The other side of the same choke is how fast it can move, and none of these is anywhere near that limit. The envelope's rise rate is dI/dt = (V_in - V_out)/L, so with 100 V of headroom and 20 A of demand the three chokes above slew full current in 22.6, 20.0 and 42.0 µs [derived]. Against six to twenty five millisecond ramps that is a margin of 140 to 1250 times [derived]. The inductance in these builds was not chosen by front speed and could not have been. It was chosen by ripple and by the discontinuous threshold, so those are the two columns to read.
The reference build sits almost exactly on CJ's numbers and neither is near gsch.labs'. Both long-arc machines run a ripple that looks careless on paper, which is something to keep in mind before optimising the ripple. Gao's stated filter corner of about 2.8 kHz comes back out of his own 113 µH and 28.8 µF at 2790 Hz, so the figures on his page agree with each other, which is not always true of published builds.
Two things about Gao's row are softer than a table can show. His 28.8 µF is a 20 µF film can plus 8.8 µF of snubbers already sitting on his bridge, which he counts into the filter because electrically they are in it. And his converter has no fixed switching frequency at all. The control is bang-bang hysteretic, so the frequency is an output rather than a setting. He gives it two ways on the same page and they are different runs. The summary band is the one the table uses, 16.5 kHz up to 31.85 kHz, and he attaches no ramp positions to it, only "really depends on operation though". The one dated capture does attach positions, and its figures are lower: it begins near 13.6 kHz, peaks near 29.7 kHz in the middle and comes back to 19 kHz at the top of the ramp (loneoceans). The two should not be mixed, positions from one and numbers from the other. The 17 kHz in the table is a third thing again, the maximum he had set for one bench test, and the ripple worked from it is only as good as any single point on a curve. Take the row as an order of magnitude, not a specification.
The ancestor, and the pin that decided whether it could work
Before anyone put a buck converter in front of a bridge, the modulator was a 555 making a sawtooth and a TL494 comparing against it. That circuit still circulates, and two people in the thread it comes from say plainly not to copy it. It is still useful, because whether it could ramp to the top comes down to one pin.
We could not check the schematic itself, so which mode it used is not established. The check still applies: on any TL494 modulator, look at OUTPUT CTRL before anything else.
Sizing the choke, step by step
This is worked on one real core, and each step has a trap the general formulas above do not warn you about.
1. Which current the choke carries
Not the primary current. The 160 A in a QCW primary circulates between the MMC and the coil and never reaches the bus. The choke sees the average bus current:
I_choke = (2/pi) · I_primary = (2/pi) · 160 = 102 A
peak power = 325 V × 102 A = 33 kWThis is the commonest confusion in the subject. A quoted "150 A" can mean the bus current or the primary current, and everything downstream changes by a factor of two depending on which. Gao's published QCW (loneoceans) gives 100 to 200 A as the usual QCW primary current rather than as a buck current, and the 160 A primary used here sits inside that band, so 102 A on the bus is not a guess.
2. The nameplate inductance is not the working one
Core: Magnetics 0078337A7, XFlux µ26. A_L 68 ± 8 % nH/T², A_e 678 mm², l_e 324 mm.
A powdered core does not saturate sharply, its permeability slides. The datasheet gives two points on that slide: 80 % of it left at 215 Oe, 50 % at 380 Oe.
H [Oe] = 0.4·pi · N · I / l_e[cm]| turns | L on the LCR (0 A) | H at 102 A | µ left | working L | ΔI at 22 kHz |
|---|---|---|---|---|---|
| 40 | 109 µH | 158 Oe | 89 % | 97 µH | 38.1 A |
| 60 | 245 µH | 237 Oe | 76 % | 186 µH | 19.9 A |
| 90 | 551 µH | 356 Oe | 54 % | 298 µH | 12.4 A |
| 108 | 793 µH | 427 Oe | 43 % | 341 µH | 10.8 A |
A ring that reads "800 µH" on the meter delivers 341 at 102 A. Wind for the inductance at working current, not for the number on the LCR.
Use 108 turns, not 60, which is also what the full design on the choke's own page uses. The reason is ripple, not efficiency. ΔI halves, 19.9 A to 10.8, which on the 25 µF output capacitor is 4.5 V of ripple against 2.5 [derived]. On a QCW ripple is a defect in the shape of the ramp more than a loss, because a jerk in the ramp is a jerk in the tip voltage and an invitation to a branch. It costs copper: 27 mΩ against 15, so 42 W average against 23 [derived]. Nineteen watts to halve a cause of branching is cheap on a machine that puts kilowatts into the arc. The DCM margin at the tight point moves the same way, 5.0 times against 2.7. The winding is decided on the choke's page, and this section supplies the permeability slide for it.
Anders Mikkelsen, the forum administrator, reads it the same way (HVF 3039), on picking a core for exactly this job:
"a pair of the 0078912A7 wound with 32 turns would give you 116 µH at zero bias and just above 40 µH at 150 A."
116 down to 40 µH is 34.5 % of the permeability left at 150 A. He gives both figures, at zero and under load, because that is the only proper way to state the inductance of a powdered choke. One number without the current it was measured at means nothing.
The other material shows the same effect at a tenth of the current. abc555 did not want to wind his own and used a stock CS467060 Sendust ring at 50 turns: 350 µH static, 170 µH at 17.5 A (kechuang), which is 49 per cent left at seventeen amps.
That is the axis the material is chosen on. A choke carrying a hundred amps of DC never reaches a saturation cliff before its permeability has halved, so the deciding property of the powder is how much inductance it keeps under bias. That is why Anders names SiFe. Three families are argued over, and the arguments talk past each other because each is right on a different axis. That argument belongs with the choke.
3. Winding it, and what is published about that
Almost nothing is published. Builders give turns and gauge and stop there.
The one useful record is Gao's. Sixty six turns of 14 AWG on the T300-2D, which he calls challenging to wind, and the winding calculated out at 99 µH and measured 113.6 µH, which he puts down to imperfect winding. That is fourteen per cent, at zero bias, from nothing but how the wire lay on the ring.
His 99 recomputes, though that only shows so much. A_L of 22.8 nH per turn squared is printed on his own page, twice the single height T300-2's 11.4 because the D is a double stack, and sixty six turns squared on that is 99.3 µH. The arithmetic is ours and the input is his. It confirms he did his own sum correctly, not that the core is what he says it is. The fourteen per cent still rests on one builder's A_L and one builder's meter, so measure your own ring rather than trusting the number.
The catalogue number is not the working inductance because of bias, and it is not the wound inductance either, because of your hands. The two errors are of the same order and here they run in opposite directions. Gao's winding came out fourteen per cent high, and bias takes about a quarter off the choke worked here. They can partly cancel rather than add, but don't count on that, because the sign of a winding error depends on how you wound it. Measure the ring you actually wound, at the current you actually run.
Everything else about winding this part is unpublished: how many layers, whether to spread the turns over the whole ring or bunch them, what a second layer costs in AC resistance at 20 kHz, whether the inner layer can shed its heat, what the interwinding capacitance does to the choke's own resonance. We have looked and not found it. What is known is that the ripple is a small AC component riding a large DC one, so the AC penalties are weighted by that fraction rather than by the full current, and the copper loss table below is worked from DC resistance for the same reason. If you have measured any of this, please send it in.
4. Saturation is checked, but it is not what limits you
Computing B = L·I/(N·A_e) from the nameplate L is wrong. The datasheet gives the incremental permeability, the slope of the curve, while the flux is set by the chord, B/H. Only the bounds can be trusted:
B_high = mu0 · mu_i · H as if the material never saturated (overstated)
B_low = mu0 · mu_incr · H as if the chord equalled the slope (understated)| turns | B low | B high | headroom to 1.6 T |
|---|---|---|---|
| 60 | 0.47 T | 0.62 T | 2.60× |
| 108 | 0.48 T | 1.11 T | 1.44× |
| 156 | 1.60 T | the limit |
Even by the high bound the limit arrives only at 156 turns, and the working limit from falling permeability arrives far sooner. Check the µ droop, and the B check will pass on its own. The 1.6 T is not on the datasheet. It is the XFlux family value, and the sheet gives only the magnetisation curve, which is enough.
5. Copper is the limit, and the window is usually roomy
108 turns × 150 mm per turn (datasheet, 40 % fill) = 16.2 m of wire| wire | window used | R | P at peak | average at 15 % duty |
|---|---|---|---|---|
| 14 AWG | 5 % | 135 mΩ | 1404 W | 211 W |
| 10 AWG | 14 % | 54 mΩ | 553 W | 83 W |
| 7 AWG | 31 % | 27 mΩ | 275 W | 41 W |
| 4 AWG | 61 % | 13 mΩ | 137 W | 20 W |
The 4710 mm² window takes 7 AWG at about 31 per cent on 108 turns, so there is room and no reason to go thinner. The copper loss is an order of magnitude above the core loss. Every row is linear in the wire length, so a 60 turn winding is these figures times 0.56 [derived].
Gao wound 14 AWG, on 66 turns of a T300-2D (loneoceans), and it is the gauge that gets copied. At 102 A the table above puts that at 780 W of peak copper. He does not publish a temperature and neither page says the choke ran hot, so the mismatch is unexplained. Either his bus current was well under the 102 A used here, or that choke was a great deal hotter than these figures allow. Do not copy the gauge until you know which. Mathieu thm took the same 14 AWG onto the core pair Anders recommends above, two 0078912A7 at 32 turns for 116 µH (HVF 3132), and his coil is on this site's own wall at 193 cm off a 14.3 cm secondary. The gauge has been used well beyond the current it was chosen for.
6. Check DCM along the whole ramp, not at one point
The bus current climbs with the voltage: 40 V is 12.6 A, 162 V is 51 A, 325 V is 102 A. The DCM threshold moves with it, because ΔI depends on the duty. The margin is bus current over threshold:
| turns | 40 V | 80 V | 162 V | 244 V | 325 V |
|---|---|---|---|---|---|
| 60 (186 µH) | 2.7× | 2.9× | 3.4× | 4.1× | 5.1× |
| 90 (298 µH) | 4.4× | 4.7× | 5.5× | 6.6× | 8.2× |
| 108 (341 µH) | 5.0× | 5.4× | 6.3× | 7.5× | 9.4× |
(with the doubler, 650 V in, the worst case.)
The tight point is always the start of the ramp, because the bus current is lowest there and there is no arc load yet. Check 40 V, not the middle.
What the doubler changes
At the start of the ramp it changes nothing, which is not obvious. At small duty:
ΔI = V_in · D(1-D) / (L·f) and D = V_out / V_in
so at small D: ΔI ~= V_out / (L·f) the input cancels outThe ripple at the start of the ramp depends on the output voltage, not the input. A doubler doubles the input and halves the duty at the same time, and the two cancel.
It changes the top of the ramp. Without a doubler, at 325 V out the duty goes to 1, the switch is almost always closed and there is no ripple at all. With a doubler the duty is 0.5, which is the point of maximum ripple:
filter C | ΔV at the top | filter corner | f_pwm/corner |
|---|---|---|---|
| 20 µF, what is fitted | 11.3 V (3.5 %) | 2611 Hz | 8.4× |
| 25 µF | 9.0 V (2.8 %) | 2336 Hz | 9.4× |
| 40 µF | 5.6 V (1.7 %) | 1846 Hz | 11.9× |
| 60 µF | 3.8 V (1.2 %) | 1508 Hz | 14.6× |
The first row is this machine, not a recommendation. It carries one 20 µF can between the minus and the far end of the choke, which is below every figure in this section, and the top row shows what that costs once the doubler is in: twice the ripple of the row in bold, for a part that costs pennies. It is the cheapest thing here to change and the only one that changes nothing else.
Capacitance fixes this, not turns. It presses ΔV down, leaves the DCM threshold alone, and costs pennies. Its only other effect is a lower filter bandwidth, and there is bandwidth to spare, since a 25 ms ramp is happy with a few hundred hertz.
The figures here are from published builds and the arithmetic on them is ours. The rig on the QCW department page draws the buck with its insides showing, because the choke is the reason a QCW has a ramp at all.