[ §3 · calculators · coupled poles ]
Coupled poles
calculatorsno arc upper 496 kHz lower 292 kHzunder arc upper 391 kHz lower 259 kHzpole split 205 → 132 kHz A stock driver will settle on: burst start → LOWER pole (f_pri 310 vs f_sec 430) ramp end → UPPER pole (f_pri 310 vs f_sec 301) The pole CHANGES across the ramp.The arc drags the secondary past the primary. Expect ajump in frequency and overshoot at the crossing: the leadwas set for a different frequency. davekni caught one ofthese on a scope. → Feed the UPPER pole into phase lead and primary tank as the ‘ramp start frequency’.It is also the robust one: an 8 % error in f_pri moves it ~1 %. self-check at equal tuning 430/430: general 550.6 / 364.7 simplified f/√(1∓k) 550.6 / 364.7
The general case, where primary and secondary are tuned to different frequencies, which is what actually happens. The f/√(1±k) shortcut is only right at equal tuning, and the self-check line below shows you that. It also says which pole a stock driver will sit on, and whether that changes during the ramp.
formula
from (1 − ω₁²/ω²)(1 − ω₂²/ω²) = k² [lossless coupled circuits] ω±² = [ω₁²+ω₂² ± √((ω₁²−ω₂²)² + 4k²ω₁²ω₂²)] / [2(1−k²)] at ω₁=ω₂ this reduces to ω₀/√(1∓k) pole rule (davekni, Uspring): f_pri < f_sec → lower; f_pri > f_sec → upper
limits
The formula is lossless. Under arc load the ZCS points (the zeros of phase) no longer sit at these poles. Uspring showed that under heavy load there may be only one zero left, and when the frequencies approach each other there are three, the middle one unstable.
It needs a tuned primary: DRSSTC or QCW. An SSTC with no primary capacitor has no poles in this sense.
The pole rule itself is two practitioners’ experience, not a theorem.