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Tesla coil interrupter for a DRSSTC: BPS, ontime and duty cycle

DRSSTC

The bang rate in hertz is the pitch of the note you hear. There is no best rate, but two of the interrupter's settings can kill the transistors.

A Tesla coil rings at hundreds of kilohertz, far above hearing. The interrupter switches it on and off at an audible rate, and that rate is the note you hear. All the music comes from it.

What it is and why

Bangs per second is the frequency of the note in hertz, so 200 bangs a second is 200 Hz. Ontime is how long each bang lasts.

duty = ontime × bangs per second

Interrupting keeps the average power tolerable while the peak goes up many times over. At 5 per cent duty each bang can carry twenty times the power, and that is why a coil is interrupted rather than run flat out.

There is no best rate, since the rate is only the pitch.

What you decide

The rate

The limit is average power, the rate times the ontime. A higher rate needs margin in RMS current and in heatsinking, and all it gives you is a higher note.

The ontime, and why too short is also a mistake

In a spark gap coil the energy leaves the primary in one transfer time. In a doubly resonant coil it is pumped in for as long as the bang lasts, so a longer ontime gives a longer spark, most clearly at modest peak currents. For the same reason, shortening the ontime does limit the primary current. At modest peak currents, though, there is nothing to protect against, and setting it short "to be safe" costs length and gets nothing back.

When a bang stops, most of the primary's energy goes back into the bus capacitors. That is normal. Allow for it when sizing the bank rather than counting it as a loss.

The gap between bangs

Set it to the fall time of the primary current, measured on a scope rather than guessed. That is the floor, and there is also a ceiling. TMaxElectronics gives both in one answer to Felix B., who was leaving 300 µs between interrupter pulses:

From my experiments deadtimes above 30us start to become noticeable as noise on the sound. What I'd recommend you do in order to set the deadtime is to scope your primary current and set it to the time it takes to decay after an interrupter pulse. Then there is no risk of hard switching at the start of the interrupter pulse.

Taken together, the floor and the ceiling make a window. Below the fall time, the next bang starts while current is still in the primary, and the bridge switches into it hard. Above about 30 µs, you hear the gap. Anywhere in between, the setting does no harm.

Whether to run staccato

Staccato ties the bangs to the mains zero crossing. Three practical points.

  • Use a CMOS 555. A plain NE555 draws a shoot-through spike and makes a mess of its own supply.
  • The trigger wants a fast falling edge near zero, a couple of microseconds wide, from a Schmitt trigger and a small capacitor.
  • With the bridge connected, the rectified voltage never reaches zero and the detector stops working. Fit a separate half-wave diode with a bleeder and no capacitors, used only for the zero detection.
Schematic titled Staccato Controller, Steven Ward, rev 1, 6/14/2003. On the left a 28 V centre-tapped transformer with its own diodes, one branch feeding an LM7812 regulator and another, through a polarity switch, feeding a 2N2222 and 2N3906 transistor pair that detects the mains zero crossing. That edge triggers a 555 monostable through a 0.1 µF capacitor, whose output goes through a 100 ohm resistor to a terminal labelled to gate of SCR/TRIAC/MOSFET; a second 555 is coupled to it through a 0.001 µF capacitor, with green indicator LEDs on both. A note below shows how to use a single 12 to 18 VAC output transformer instead.
Steve Ward's staccato controller of 2003, drawn for an SCR, triac or MOSFET switch rather than a DRSSTC driver, but with the third point above already in it: the zero crossing comes off its own small transformer and diodes, not off the rectified supply. Schematic by Steve Ward, from his staccato page, used with his permission.

What one actually looks like

Going by what gets published, they are small, analogue and cheap. xionglongztz has put a complete one on OSHWHub. It is two NE555 and an LM393 on a 60 by 80 mm board off 12 V, with the output on an ST multimode fibre connector. One 555 makes the square wave and the other sets the duty. The comparator is for the second mode, audio in on a 3.5 mm jack with channel select, so the same box either runs at a rate you set or plays what you feed it. Low frequency pulse and long pulse are switches on the side.

Two things about it matter more than the part numbers. The fibre is the board's only output, so the fail-safe rule is built into the layout instead of added later. There is also no microcontroller in it at all, which is ordinary in Chinese practice and not a compromise.

The board also goes against the staccato advice above, which says to use a CMOS 555 because a plain NE555 draws a shoot-through spike and fouls its own supply. This board uses NE555s and works. The two cases ask different things of the part, though. Staccato needs a fast edge timed to the mains and free running does not, so read the CMOS advice as belonging to the staccato case, where it was made.

Daniel Marks' board in the DRSSTC PCB Pack is the same kind of interrupter with its circuit published. It is Steve Ward's burst mode interrupter with an external sound trigger added, under a licence that lets the drawing be printed here and not only linked.

Full schematic of a DRSSTC interrupter board. Top left, a barrel jack and a 9 V supply. Below it, U1, an NE555 astable whose mark and space are set independently by two 50k trimmers, RV1 and RV2, through a pair of 1N4148 steering diodes into a 1 microfarad timing capacitor. Centre, two further NE555 timers, U2 and U3, with their own trimmers and timing capacitors. Lower left, an audio input at J10 through a 2.2k resistor and 1N4148 and 1N5819 clamps into an LM339 comparator, then through a 10 nF capacitor into a second LM339 section. Right of centre, OP1, an IFE97 fibre optic transmitter, driven through a 220R resistor and a 51R resistor with an INTLED net alongside. Top right, U5, an ATTINY85-20PU, with a USB B connector at J20 whose D plus and D minus lines pass through 68R resistors and 1N5227B zener diodes, and a six pin in circuit programming header at J16. The title block reads DRSSTC Interrupter, based on Burst Mode Interrupter by Steve Ward, External Sound Trigger Added, drafted by Daniel Marks, February 8 2018.
DRSSTC Interrupter. Schematic by Daniel L. Marks, 2018, CC BY-SA 4.0, from the DRSSTC PCB Pack. Open it full size to read the designators.

The skeleton matches the Chinese board, with timers making the pulse train, a comparator on an audio input and a fibre transmitter as the output. It differs in two ways.

  • The microcontroller sits beside the analogue chain instead of replacing it. The sheet carries an ATtiny85 with a USB socket and a programming header, for the oneTesla MIDI code, as well as three NE555s. Both paths end at the same fibre LED, so a board with a micro can keep the analogue timers too.
  • One of the timers has its mark and its space on separate trimmers. RV1 and RV2 charge and discharge the same 1 µF through opposed 1N4148s. That gives rate and ontime as two knobs instead of one knob and a compromise, the same two numbers as at the start of the article, here as parts.

Ward's own sheet, which Marks started from, has the same skeleton with nothing added.

Schematic titled Interrupter with Burst Mode, Steve Ward, rev 1.0, 9/20/2005. Top, a 555 labelled BPS control, its rate set by a 50k pot, coupled through a 0.01 µF capacitor into the trigger of a second 555 labelled Pulse Width Control, whose width is set by a 5k pot and a 47 nF capacitor and whose output pin goes to the output signal and ground terminals. Below, a third 555 labelled Burst Mode, its on and off times set separately by two 50k pots through steering diodes, driving the second timer's reset pin through a Burst Mode Enable switch. Right, a 9 V battery with a power switch and LED, and a row of 0.1 µF decoupling capacitors.
Rate on one timer, ontime on a second, and a third that switches the second on and off in bursts. Ward runs it off a 9 V battery in an aluminium box and sends the signal down shielded cable grounded at the coil end only, or better, fibre. Schematic by Steve Ward, from his DRSSTC interrupter page, used with his permission.
A square of perforated prototyping board seen from above on a patterned carpet: a few chips, capacitors and resistors across the upper half, a red-collared RCA socket at the top right, a red LED, and along the bottom edge four black knobs with ON, OFF, OFF and ON written under them.
A built one: the interrupter board for Ward's DRSSTC-3, whose page lists normal and burst mode operation. Photo by Steve Ward, from his DRSSTC-3 page, used with his permission.

What will get you

The link to the coil has one rule of its own. A broken fibre must turn the coil off, not leave it on, and the receiver does not do that by itself. Read the fibre and the fail-safe rule before the first MIDI file rather than after.

The numbers

  • A note: bangs per second in hertz. 200 bangs a second is 200 Hz.
  • MIDI ontime: typically no more than about 300 µs a note.
  • The gap between bangs: the fall time of the primary current at the bottom, about 30 µs at the top (TMaxElectronics).
  • Duty: ontime times rate, summed over voices.
  • At 5 per cent duty: each bang can carry about twenty times the average power.

The sound is a train of square pulses with a great many harmonics. It is recognisable but metallic, and the range is narrow. The timbre follows the size of the coil, so a ten centimetre coil sounds like a wasp and a metre one sounds impressive on the same MIDI file. For real music out of plasma, people go to HFSSTC.

What goes wrong

  • Devices die during a particular piece of music and not others. The summed duty of the voices. Scale the ontime in firmware.
  • Audible noise between notes. The gap between bangs is over about 30 µs. Shorten it towards the fall time of the primary current, not below.
  • The arc looks disappointing. Test in the dark. In daylight the arc is pale and you will undersell your own result.
  • A staccato trigger that stops working once the bridge is connected. The rectified voltage no longer reaches zero. Separate half-wave diode.
  • Shorter arcs after shortening the ontime for safety. That is expected, because the energy is pumped in across the whole bang.

Where next


A QCW has no interrupter as such. The box in that position tells the bridge when to run and tells the buck what voltage to hold while it runs, and that second job is the ramp. Bangs per second there is five to seven instead of hundreds. There is no separate ontime, because the bridge runs for exactly as long as the ramp lasts. On the DRSSTC diagram the interrupter is a box with the two knobs it sets drawn under it. On the QCW page the same box is a modulator, with a line running up the outside to the buck.

more in DRSSTC →