[ §1 · sensing ]

SSTC current transformers: why feedback and protection need two

Taking the feedback and the protection off the same current transformer saturates its core, and the protection gets weaker exactly when it is needed.

CommonGnd4 August 202623 min read

A ring on the primary conductor, and the whole driver's view of what the coil is doing. Take both jobs off one of them and the protection goes soft exactly when you need it.

What it is and why

The conductor itself is the one-turn primary; the winding on the ring is N turns of secondary. The current in that winding is N times smaller, and a burden resistor turns it into a voltage the driver can read.

I_secondary = I_primary / N,   U = I_secondary × R_burden

That is the whole device. Two of them appear on a DRSSTC because the driver wants two different things from the primary current: the phase of it, to know when to switch, and the size of it, to know when to stop.

What you decide

Two rings, or one

Criterion: whether anything is loading the transformer that also has to carry the protection.

Diagram of a DRSSTC tank loop. The loop runs from the bridge, marked as the low end, through the primary on the top run, then through the tank capacitor on the right, then back along the return lead to the bridge. Two rings sit on that return lead, both after the capacitor and before the bridge, and each carries a note: the feedback ring's burden has ground on one side of it so an ordinary probe is safe, and the overcurrent ring's burden has ground on neither side so it wants a differential probe. The corner between the primary and the capacitor is ringed with a dashed line and marked not here, because the resonant rise puts the tank's whole voltage across a transformer in that position, ten to twelve kilovolts on this site's own coil, and it punctures the insulation.

The picture is the argument in one line: two rings on the same lead, and both of them at the low potential end of it. Everything below is why each half of that sentence matters.

The feedback path has a phase lead network hanging off it, and that network loads the first stage. The core saturates, and the protection gets weaker exactly when it is needed. The UD2.x boards keep the two apart, and that is not an accident.

The UD3 does not, and it is worth knowing why the newer board went the other way. Its specification gives one input doing both jobs, a "Current transformer input for gate drive synchronization and current limiting", on a default burden of 3.3 ohms, with CT2 reserved for a hall effect sensor and marked as omittable. Sharing forces the sensitivity down, because the same network now has to reach the trip current without running the comparator out of range: at its default 600 turns into 3.3 ohms the UD3 sits at 0.0055 V/A [derived], which against its stated 4.08 V comparator ceiling reaches 742 A, and the specification's own maximum of 1.23 A times the ratio gives 738 [derived]. A network in the band below would reach 204 A at 0.02 V/A and 102 at 0.04 [derived], which is not a DRSSTC trip point. So the band below is for a ring that only carries feedback. A ring that also sets the limit has to be about an order less sensitive, and the phase lead problem above is then paid for rather than avoided.

Sharing was done deliberately eighteen years earlier, with the circuit published. Steve Conner's PLL driver manual specifies 33 turns on a one inch Fair-rite 78 ring into a 0.33 ohm non-inductive burden, "~10mV/A and a maximum reading of about 500A (corresponding to 5V output from the peak hold rectifier)", and then says how to take both signals off it: "In a DRSSTC, the same current transformer can be used to derive the feedback signal for the PLL. This is done by connecting two back-to-back diodes in series with the burden. CTSIG2 is taken across the burden alone, and CTSIG1 across the burden and the diodes. This gives a better signal at low primary currents." The diodes are the whole trick: the protection tap sees the burden, the feedback tap sees the burden plus two diode drops, so the small signals that the loop needs early in a bang are lifted clear without moving the trip point. His second configuration holds the burden and changes only the ring, 100 turns for 1500 A full scale, and both land in the same place: 5.00 V and 4.95 V of full scale, and 15.2 A and 15.0 A of secondary current [derived]. So across a threefold change of machine he holds the volts and the secondary amps and lets the turns move. In this page's own terms that is 0.010 and 0.0033 V/A [derived], with the UD3 between them at 0.0055. Three shared rings by two authors, all of them under the band above, which is what the band being for feedback alone looks like from the outside.

How many turns, and whether to cascade

Criterion: the burden you want. More turns means less secondary current, which means a larger burden for the same voltage.

And the burden has a ceiling that has nothing to do with phase, set by the comparator it feeds. Gao states it as a design rule on his UD2.7 page: "The comparator voltage should ideally be less than 7V to keep within the bounds of the comparator when on a 9V rail." So `` R_max = V_comparator · N / I_primary `

  and on his own numbers, 650 A through 625:1, that is **6.7 Ω** against the 5.1 he fits, which is 24 per cent of headroom [derived, both].  Which is where the one ampere comes from, and it is not arbitrary. Wind

N` so the secondary sits near an amp at your working current and the ceiling lands near 7 Ω whatever the machine's size: 500 A through 500:1 and 1000 through 1000:1 both give it [derived]. The convention converts a machine-dependent bound into a fixed one. That is the same conclusion this corpus reached from the other end, where Steve Conner holds fifteen amps and five volts rather than one amp, and what survives across both is the voltage.

A QCW wants a much smaller ratio than a DRSSTC, and the reason is the ramp itself. Gao winds his QCW's feedback at 175:1 on two cascaded cores, with the phase lead tapped at 100:1, against "say 1000:1 in a conventional large DRSSTC". His reason is the start of the bang rather than the size of the machine: "at the beginning of the pulse, the bus voltage is quite low, on the order of 30 to 40V. Combined with the low primary impedance, the primary current will begin much lower than a conventional DRSSTC." A ratio chosen for hundreds of amps has nothing to read when the ramp opens, which is exactly when the loop has to find the pole. That machine peaks at 100 A with 150 as its maximum, so the ratio is sized against a current that never gets near a DRSSTC's.

When one core cannot carry the turns, two go in cascade and the ratios multiply. Mads Barnkob's DRSSTC II is the arrangement written out: "two cores with 33 windings on each and one winding going through the second", which is 1:33:33 and therefore 1:1089. Steve Ward's general guide to DRSSTC design does that on DRSSTC-1, with a pair of cores in the feedback path: "Both of them are a 1:33 ratio, and being cascaded, the final current reduction ratio is 1:1089 or roughly 1:1000." And he does it twice. The active current limiting on the same schematic gets "a cascaded pair of CTs (1:33 ratio on each)" of its own, which is this page's argument drawn as a circuit: not a tap off the feedback chain, a second chain. In this page's notation that is 1089:1, and it is Ward's coil rather than the board the burdens below come from, for which no ratio is published. Work yours out from the burden you want.

The burden, and the phase error it brings with it

The phase error is not a thing this site worked out on its own, and the published version of it has a different consequence. Barnkob states it flatly on the same page: "Higher value burden/shunt resistor will introduce a phase shift and ruin your measurement." He is talking about reading the current with a scope, and the sentence ends where a measurement ends. The same mechanism, in a driver that takes its switching instant from that reading, does not ruin a measurement: it moves the instant, which is what the rest of this section sizes. One mechanism, two consequences, and the one that matters here is the one nobody sees on a screen. And the other end of the same question has a published answer too. The criterion below bounds the burden from above. Chrisader, on HVF 1680, reports that it cannot be absent: "In low power arrangement where current transformer has one section there is necessary to add in serial to CT resistor. Without it phase lead is impossible." He gives no mechanism and this page does not supply one for him, but the machine is worth having beside the claim: 60 turns on a TX32/19-3E25 core at 70 to 75 kHz, and a delay he takes from over 500 ns to about 200 with a 1.2 mH coil of 16.9 Ω. So the burden is bounded at both ends by two builders who never met the same problem: too large and it shifts what the driver reads, absent and there is nothing to shift.

An ideal current transformer is a current source and gives no phase shift into a pure resistor. A real one does, and it is a lead, not a delay:

phi_error ~ R_burden / (w · L_magnetising)   [radians]

Count it with a minus sign: when you add up the total lead, this term subtracts. At 51 Ω it is a few nanoseconds, up to four per cent of the whole lead; at 3.6 Ω it is a fraction of a nanosecond and irrelevant.

And the magnetising term picks a pole, which is why it matters. That term is R/(w·L_m) in angle, so in time it goes as one over frequency squared, and it is therefore worst exactly where you least want it. On this coil, against 920 µH of magnetising inductance, a 51 Ω burden puts 14.0 ns of it at the 317 kHz lower pole against 5.2 ns at the 519 kHz upper one, a factor of 2.7 [derived]. That is error delivered preferentially to the pole you do not want, and it widens the window a self-oscillating driver can settle in downwards. Which is a genuine argument for a smaller burden. It runs out sooner than it looks, because it is one term of two, and the sizing below is where the other one turns it around.

Which makes the burden a machine-class choice rather than a value. Forty-seven ohms is ordinary on a DRSSTC, where there is one thing to lock to and the arc does not walk the frequency anywhere. A QCW wants less, because it has two poles and spends every ramp moving between them, and the error above is the one thing in the loop that grows as the frequency falls. The one published QCW that states its burden runs 47 Ω anyway, Gao's, at "300 turns with 47 Ohm giving 0.157V/A" (loneoceans). Two things about that before it is read as a recommendation. His coil does lock where he wants, "primary set at turn 7.5 (392kHz) but coil oscillates itself to the upper pole", and his poles are close together, a lower one he puts at 340 kHz against a primary at 392, so the 1/f² asymmetry across his own span is far smaller than across a machine whose poles sit at 519 and 317. And he says plainly on the same page that "as far as tuning goes for a QCW, I'm not exactly sure what the best way is". A figure from a builder who says that is a record of what he built, not a value to copy onto a coil with a wider split.

So how much less. The burden carries two errors, not one, and they pull opposite ways. The magnetising term is the one above. The second is leakage: the inductance left uncoupled between the windings sits in series with the burden, and in time it comes out as L_leak / R_burden, the same at every frequency, because the angle rises with w and dividing by w to get time takes the frequency straight back out. So the error a burden hands the loop is

t_error  =  R_burden / (w² · L_m)   +   L_leak / R_burden
            magnetising                 leakage
            worst at the lower pole     flat across the whole ramp

One term rises with the burden and the other falls, so what the burden has is a minimum, not a direction, and it sits where the two are equal:

R_best   =  w_lower · sqrt(L_m · L_leak)
t_floor  =  2 · sqrt(L_leak / L_m) / w_lower

sqrt(L_leak/L_m) is sqrt(1 - k²), the winding's coupling defect, so that floor is set by how evenly the turns are laid and by nothing else. No burden gets under it. If you want less error than the floor, the answer is a better wound ring, not a smaller resistor.

Both inputs are measurements, and they are the two the bench sheet already asks for: inductance at the secondary with the primary open is L_m, with the primary shorted it is L_leak. A neatly wound 20-turn ring gives 920 µH and about 0.18 µH [derived, from N²·A_L on PC40 and from k ~ 0.9999], which puts the best burden at 26 Ω at the 317 kHz lower pole, and the floor at 14.2 ns, or 5.3 % of a 270 ns lead. Run over the values people fit:

 3.6 Ω    51.9 ns    19.2 % of the lead
10 Ω      21.1        7.8
26 Ω      14.2        5.3   <- the minimum
47 Ω      16.8        6.2
51 Ω      17.6        6.5

This corrects a sizing rule this page carried until 21 Aug 2026. It read R_burden < fraction · T_lead · w_lower² · L_m, giving under 10 Ω for one per cent of the lead, and a note beside it said leakage barely affects the angle. Both were the magnetising term mistaken for the whole error. The notes those figures came from tabulate a best number of turns, and a quantity with an optimum cannot have come from one monotonic term. Sized by the corrected expression, the 10 Ω that rule recommended is worse than the 51 Ω it was arguing against.

Three things fall out that a single recommended value hides. A sloppier winding wants a bigger burden, not a smaller one, because R_best goes as sqrt(L_leak): at the bench sheet's 0.5 µH pass mark the best value is 43 Ω, and at its 2 µH the best value is 85 Ω [derived, both]. The 47 to 51 Ω on Gao's coil and on this one is not tradition, or not only tradition, since a well wound ring at DRSSTC frequencies puts the minimum at 40 to 42 Ω and the curve through there is flat enough that the difference is not worth an argument. What makes those values wrong on a QCW is not the number but the sweep: the minimum follows w_lower, so it moves from 42 Ω at the top of this trajectory to 26 Ω at the bottom. Size at the bottom, where the magnetising term is largest and the lead is scarcest.

The lead coil's own DCR sits in series with the burden and belongs in the formula: phi = arctan(wL / (R_burden + DCR)).

Feedback strength, which is the number to compare

How many turns is not a meaningful figure on its own. This is:

feedback strength = |Z| / N   [volts per amp of primary current]

where |Z| is the whole burden network, resistor and lead coil together. From it falls out the current at which the signal hits the clamping diodes:

I_clamp = V_f · N / |Z|

Working boards sit around 0.02 to 0.04 V/A, on rings that carry feedback and nothing else. A ring that also sets the current limit sits lower, for the reason in the note further up.

When the choice is not yours

Everything above assumes the ratio and the burden are yours to pick. On a bought board they may not be. Eastern Voltage Research's Universal DRSSTC Controller fixes the ratio outright and takes most of the burden out of your hands. Its feedback pads take "a 1000:1 current sense transformer", its protection pads take a second one, also 1000:1, and neither burden is a number the builder sets. The sheet never uses the word: it names the ratio, asks for nothing across the input, and leaves the burden inside the box by omission rather than by statement, which is our reading of its silence and not a line you can quote from it. Two rings, two identical ratios, and the resistive half of the burden settled before the board reaches you.

Only that half, though. The other half of the same network, the lead coil this page has been counting in |Z| all along, the board hands straight back: it arrives as socketed plug-in inductor modules, IND-1 to IND-8, and the builder picks one by the size of the switch, 9 to 15 uH at the small end and 60 to 100 uH at the large. So the ratio is fixed, the resistor is fixed, and the reactance is a choice made with a screwdriver. Anyone reading the formula above will see what follows: swapping the module moves |Z|, so it moves the feedback strength too, even though the reason you swap it is the switching instant rather than the signal. The two are the same network and cannot be tuned apart.

That is the one-amp convention cast in metal. At 1000:1 a machine pulling a thousand amps of primary current hands the board one amp, and the sheet's rated ceiling agrees: 1000 A on the standard unit, 2000 A on the other. What stays adjustable is the protection threshold, 50 A to 2000 A on two potentiometers, coarse and fine, added together. The ratio does not, and neither does the resistor behind it.

The trade is the usual one. Nothing to calculate and nothing to get wrong, against no way to move the feedback strength if your machine runs two hundred amps rather than a thousand. Boards that leave the burden to you pay for that freedom with a phase error you then have to hunt down. This one pays for the absence of the hunt by fixing where you land.

And a board from the other side of the trade lands on the same ratio. terrariaking publishes a DRSSTC driver on OSHWHub that leaves the burden to the builder and states the threshold as a formula rather than a number: "阈值电压（lm393的3脚电压）=(要设定的过载电流/互感器匝数)采样电阻阻值", the voltage at the comparator's pin 3 being the overcurrent setting divided by the transformer's turns and multiplied by the sampling resistor. The board fits 10 Ω there and notes "R5=10Ω时1V≈100A"*, one volt for about a hundred amps. Put those together and the ratio falls out: a hundred amps through N into ten ohms making one volt needs N = 1000 [derived]. A hobby board in another language, with the burden left open and no datasheet convention to follow, arrives at 1000:1 anyway. That is worth more than either page saying it alone.

And the feedback ring has a direction, which this page had not said. Get it backwards and the machine does not run at all: the sheet's phase select switch "allows the user to reverse the phase of the output gate drive with respect to the phase of the primary feedback current", and it says the switch "has the same effect as reversing the wires (or direction of the primary lead) of the feedback current transformer". Its own instruction is the one to keep whatever board you run: "if during initial testing, you find your DRSSTC system is not self-oscillating and switching, to simply power down the system and change the phasing". A coil that will not start is a coil whose feedback ring may simply be round the wrong way, and that is a two minute check rather than a fault to diagnose. Note which failure this is not: it is not a phase error to be trimmed, it is a sign reversal, and no amount of lead inductance corrects it.

One line from that sheet is worth having whichever board you run: "Be sure the wires between the current sense transformer and the controller are twisted tightly together to maximize coupling and reduce inductance." Both rings feed low-level signals across a machine that is radiating hard, and the twist is what stops the run between ring and board from becoming a third winding.

Where to put it

Where the potential is low. There is a second option, and Ward allows for it in the guide linked above: "This design uses primary current feedback as the basis, but could also work from secondary base-current feedback if so desired." His next sentence says primary feedback is what he prefers. A ring at the base of the secondary on the ground wire reads secondary current instead, and what argues against it has nothing to do with the protection, which sits on its own primary ring either way. It is the drive signal. Under a ground strike the secondary jumps to a harmonic of its own resonance, so a loop reading secondary current is reading the one part of the machine that has stopped reporting itself. That is what a ground strike does to a DRSSTC, and it is why the feedback comes off the primary at all.

Wind it the wrong way round and the feedback gives you zero or chaos. Turning the ring over is the test, and it costs nothing to try first.

What will get you

And only one of the two can be probed with an ordinary probe. The feedback burden has ground on one side of it. The overcurrent burden has ground on neither, and needs a differential probe. Note also that a signal generator delivers orders of magnitude less current than a primary does, so to test a ring on the bench, wind ten to a hundred turns through it to get a signal at all.

The numbers

Ratio in use: 1089:1 on Ward's DRSSTC-1, two cascaded cores at 33 turns each, with a second pair of the same for the limit. No ratio is published for the board the burdens below come from.
Burdens on a UD board: feedback 51 Ω 2 W, overcurrent 5.1 Ω 0.5 W.
Feedback strength on working boards: 0.02 to 0.04 V/A.
Phase error at 51 Ω: a few nanoseconds, up to four per cent of the whole lead, and it subtracts. At 3.6 Ω it is negligible.

What goes wrong

The coil will not start, or the frequency is nonsense. Winding direction. Turn the ring over.
The protection is weak at exactly the current that matters. One ring doing both jobs, with the lead network saturating its core.
It tracks at low power and stops tracking at high. Clamping, from a feedback strength three or four times what it should be.
The transformer failed with a hole in its insulation. It was between the tank capacitor and the primary, at kilovolts.
Bench tests on a signal generator show nothing at all. Not enough current. Wind more turns through the ring.

Where next

Inside the driver, which is what these two signals go into.
Overcurrent is not a setting, the protection side in full.
DRSSTC phase lead: what it is made of, which inductor to fit, the network that loads the feedback ring.

The two rings on the DRSSTC diagram are drawn separately and labelled separately for the reason at the top of this piece. On the QCW page, taking the tank capacitor out removes the overcurrent one and leaves the feedback.

Feedback strength does the |Z| / N above and tells you the primary current at which the loop takes over from the oscillator, which is the number this page argues is worth more than the turns count.
CT timing works the two terms of the phase error and finds the burden that minimises them, on your own magnetising and leakage figures rather than this page's.
Where the feedback comes from, the three places the signal can be taken from and the failure that sorts between them.

current transformerfeedbackOCD