A current transformer is a ferrite ring on the primary conductor, and it is the driver's only view of what the coil is doing. A DRSSTC carries two of them, one for feedback and one for overcurrent. Put both jobs on one ring and the protection goes soft at high current, which is when you need it.
What it is and why
The conductor itself is the one-turn primary; the winding on the ring is N turns of secondary. The current in that winding is N times smaller, and a burden resistor turns it into a voltage the driver can read.
I_secondary = I_primary / N, U = I_secondary × R_burden
A DRSSTC has two of them because the driver wants two different things from the primary current: its phase, to know when to switch, and its size, to know when to stop.
What you decide
Two rings, or one
Criterion: whether anything is loading the transformer that also has to carry the protection.
Both rings go on the same lead, the return lead, at its low potential end.
The feedback path has a phase lead network hanging off it, and that network loads the first stage. The core saturates and the protection gets weaker at the currents where it matters. The UD2.x boards keep the two rings apart on purpose.
The UD3 goes the other way. Its specification gives one input doing both jobs, a "Current transformer input for gate drive synchronization and current limiting", on a default burden of 3.3 ohms, with CT2 reserved for a hall effect sensor and marked as omittable. Sharing forces the sensitivity down, because the same network now has to reach the trip current without running the comparator out of range. At its default 600 turns into 3.3 ohms the UD3 sits at 0.0055 V/A [derived]. Against its stated 4.08 V comparator ceiling that reaches 742 A, and the specification's own maximum of 1.23 A times the ratio gives 738 [derived]. A network in the band given below would reach 204 A at 0.02 V/A and 102 at 0.04 [derived], which is not a DRSSTC trip point. The band is for a ring that only carries feedback. A ring that also sets the limit has to be about ten times less sensitive, and then the phase lead loading is paid for rather than avoided.
Steve Conner shared one ring on purpose eighteen years earlier, and published the circuit. His PLL driver manual specifies 33 turns on a one inch Fair-rite 78 ring into a 0.33 ohm non-inductive burden, "~10mV/A and a maximum reading of about 500A (corresponding to 5V output from the peak hold rectifier)", and then says how to take both signals off it: "In a DRSSTC, the same current transformer can be used to derive the feedback signal for the PLL. This is done by connecting two back-to-back diodes in series with the burden. CTSIG2 is taken across the burden alone, and CTSIG1 across the burden and the diodes. This gives a better signal at low primary currents." The protection tap sees the burden and the feedback tap sees the burden plus two diode drops. The small signals the loop needs early in a bang are lifted clear, and the trip point does not move.
His second configuration keeps the burden and changes only the ring, 100 turns for 1500 A full scale. Both land in the same place: 5.00 V and 4.95 V of full scale, and 15.2 A and 15.0 A of secondary current [derived]. Across a threefold change of machine he holds the volts and the secondary amps and lets the turns move. As feedback strength that is 0.010 and 0.0033 V/A [derived], with the UD3 between them at 0.0055. That makes three shared rings from two authors, all below the band, consistent with the band being for feedback alone.
All of this assumes you need the protection. On a doubly resonant coil you do: the tank capacitor cancels the primary's reactance and nothing limits the current. On a single resonant one nothing cancels, the primary's own reactance is the limit, and the current is tens of amps rather than hundreds. The SSTC diagram draws one ring for that reason, and the DRSSTC one draws two.
How many turns, and whether to cascade
Criterion: the burden you want. More turns means less secondary current, which means a larger burden for the same voltage.
The burden also has a ceiling, set by the comparator it feeds and unrelated to phase. Gao states it as a design rule on his UD2.7 page: "The comparator voltage should ideally be less than 7V to keep within the bounds of the comparator when on a 9V rail." So
R_max = V_comparator · N / I_primaryand on his own numbers, 650 A through 625:1, that is 6.7 Ω against the 5.1 he fits, 24 per cent of headroom [derived, both].
That is also where the habit of about one ampere on the secondary comes from. Wind N so the secondary sits near an amp at your working current and the ceiling lands near 7 Ω whatever the machine's size: 500 A through 500:1 and 1000 through 1000:1 both give it [derived]. The convention turns a machine-dependent bound into a fixed one. Steve Conner comes at it from the other end, holding fifteen amps and five volts rather than one amp, and what the two have in common is the voltage.
A QCW wants a much smaller ratio than a DRSSTC, because of the ramp. Gao winds his QCW's feedback at 175:1 on two cascaded cores, with the phase lead tapped at 100:1, against "say 1000:1 in a conventional large DRSSTC". His reason is the start of the bang rather than the size of the machine: "at the beginning of the pulse, the bus voltage is quite low, on the order of 30 to 40V. Combined with the low primary impedance, the primary current will begin much lower than a conventional DRSSTC." A ratio chosen for hundreds of amps has nothing to read when the ramp opens, and that is when the loop has to find the pole. That machine peaks at 100 A with 150 as its maximum, so the ratio is sized for a current far below a DRSSTC's.
When one core cannot carry the turns, two go in cascade and the ratios multiply. Steve Ward's general guide to DRSSTC design does that on DRSSTC-1, with a pair of cores in the feedback path: "Both of them are a 1:33 ratio, and being cascaded, the final current reduction ratio is 1:1089 or roughly 1:1000." He does it twice. The active current limiting on the same schematic gets "a cascaded pair of CTs (1:33 ratio on each)" of its own, a second chain rather than a tap off the feedback chain. Written as below that is 1089:1. It is Ward's coil, not the board the burdens below come from, and that board has no published ratio. Work yours out from the burden you want.
The burden, and the phase error it brings with it
The criterion below bounds the burden from above. At the other end, Chrisader on HVF 1680 reports that it cannot be absent: "In low power arrangement where current transformer has one section there is necessary to add in serial to CT resistor. Without it phase lead is impossible." He gives no mechanism. His machine is 60 turns on a TX32/19-3E25 core at 70 to 75 kHz, and he takes the delay from over 500 ns to about 200 with a 1.2 mH coil of 16.9 Ω. The burden is therefore bounded at both ends. Too large and it shifts what the driver reads, which is what the rest of this section sizes. Absent, on his report, and there is nothing for the lead to shift.
An ideal current transformer is a current source and gives no phase shift into a pure resistor. A real one does, and the shift is a lead (the signal arrives early):
phi_error ~ R_burden / (w · L_magnetising) [radians]When you add up the total lead, this term counts with a minus sign. At 51 Ω it is a few nanoseconds, up to four per cent of the total lead; at 3.6 Ω it is a fraction of a nanosecond and irrelevant. By this term alone, the smaller the burden, the cleaner the transformer.
The magnetising term also favours one pole. It is R/(w·L_m) as an angle, so as a time it goes as one over frequency squared and is worst at the low end. On this coil, against 920 µH of magnetising inductance, a 51 Ω burden puts 14.0 ns of it at the 317 kHz lower pole against 5.2 ns at the 519 kHz upper one, a factor of 2.7 [derived]. The error lands mostly on the pole you do not want, and it widens downwards the window a self-oscillating driver can settle in. That is a real argument for a smaller burden. It runs out sooner than it looks, because this is one of two terms, and the sizing below shows the other one turning it around.
That makes the burden depend on the class of machine. Forty-seven ohms is ordinary on a DRSSTC, where there is one thing to lock to and the arc does not walk the frequency anywhere. A QCW wants less, because it has two poles and spends every ramp moving between them, and the error above is the one thing in the loop that grows as the frequency falls.
The one published QCW that states its burden runs 47 Ω anyway: Gao's, at "300 turns with 47 Ohm giving 0.157V/A" (loneoceans). Two things before reading that as a recommendation. His coil does lock where he wants, "primary set at turn 7.5 (392kHz) but coil oscillates itself to the upper pole", and his poles are close together, a lower one he puts at 340 kHz against a primary at 392. The 1/f² asymmetry across his span is far smaller than on a machine whose poles sit at 519 and 317. He also says on the same page that "as far as tuning goes for a QCW, I'm not exactly sure what the best way is". His figure is a record of what he built, not a value to copy onto a coil with a wider split.
How much less depends on a second error. The burden carries two, and they pull opposite ways. The magnetising term is the one above. The second is leakage: the inductance left uncoupled between the windings sits in series with the burden, and as a time it comes out as L_leak / R_burden, the same at every frequency. The angle rises with w, and dividing by w to get time takes the frequency back out. The timing error a burden hands the loop is then
t_error = R_burden / (w² · L_m) + L_leak / R_burden
magnetising leakage
worst at the lower pole flat across the whole rampOne term rises with the burden and the other falls, so the burden has a minimum rather than a direction, at the value where the two are equal:
R_best = w_lower · sqrt(L_m · L_leak)
t_floor = 2 · sqrt(L_leak / L_m) / w_lowersqrt(L_leak/L_m) is sqrt(1 - k²), the winding's coupling defect, so the floor is set by how evenly the turns are laid and by nothing else. No burden gets under it. For less error than the floor, wind a better ring; a smaller resistor will not get there.
Both inputs are measurements, the two the bench sheet already asks for: inductance at the secondary with the primary open is L_m, and with the primary shorted it is L_leak. A neatly wound 20-turn ring gives 920 µH and about 0.18 µH [derived, from N²·A_L on PC40 and from k ~ 0.9999]. That puts the best burden at 26 Ω at the 317 kHz lower pole, and the floor at 14.2 ns, or 5.3 % of a 270 ns lead. Over the values people fit:
3.6 Ω 51.9 ns 19.2 % of the lead
10 Ω 21.1 7.8
26 Ω 14.2 5.3 <- the minimum
47 Ω 16.8 6.2
51 Ω 17.6 6.5A single recommended value hides three things. A sloppier winding wants a bigger burden, not a smaller one, because R_best goes as sqrt(L_leak): at the bench sheet's 0.5 µH pass mark the best value is 43 Ω, and at its 2 µH it is 85 Ω [derived, both]. The 47 to 51 Ω on Gao's coil and on this one has a reason behind it, too: a well wound ring at DRSSTC frequencies puts the minimum at 40 to 42 Ω, and the curve is flat enough there that the difference does not matter. What makes those values wrong on a QCW is the sweep. The minimum follows w_lower, so it moves from 42 Ω at the top of this trajectory to 26 Ω at the bottom. Size at the bottom, where the magnetising term is largest and the lead is scarcest.
The lead coil's own DCR sits in series with the burden and belongs in the formula: phi = arctan(wL / (R_burden + DCR)).
Feedback strength, which is the number to compare
The turns count means little on its own. The figure to compare is
feedback strength = |Z| / N [volts per amp of primary current]where |Z| is the burden network, resistor and lead coil together. It also gives the current at which the signal hits the clamping diodes:
I_clamp = V_f · N / |Z|Working boards sit around 0.02 to 0.04 V/A, on rings that carry feedback and nothing else. A ring that also sets the current limit sits lower, for the reason under the UD3 above.
When the choice is not yours
On a bought board the ratio and the burden may not be yours to pick. Eastern Voltage Research's Universal DRSSTC Controller fixes the ratio outright and takes most of the burden out of your hands. Its feedback pads take "a 1000:1 current sense transformer", its protection pads take a second one, also 1000:1, and neither burden is a number the builder sets. The sheet never uses the word. It names the ratio and asks for nothing across the input, so the burden stays inside the box. That is our reading of what the sheet leaves out, and the sheet has no line saying so. Two rings, two identical ratios, and the resistive half of the burden fixed before the board reaches you.
The other half of the network, the lead coil counted in |Z| above, the board hands back to you. It comes as socketed plug-in inductor modules, IND-1 to IND-8, and the builder picks one by the size of the switch, 9 to 15 uH at the small end and 60 to 100 uH at the large. That leaves the ratio and the resistor fixed and the reactance chosen with a screwdriver. Swapping the module moves |Z|, so it moves the feedback strength too, even though you swap it for the switching instant. Both sit in the same network and cannot be tuned separately.
That is the one-amp convention in hardware. At 1000:1 a machine pulling a thousand amps of primary current hands the board one amp, and the sheet's rated ceiling matches: 1000 A on the standard unit, 2000 A on the other. The protection threshold stays adjustable, 50 A to 2000 A on two potentiometers, coarse and fine, added together. The ratio and the resistor behind it do not.
The trade is the usual one. There is nothing to calculate and nothing to get wrong, but no way to move the feedback strength if your machine runs two hundred amps rather than a thousand. Boards that leave the burden to you leave you a phase error to hunt down. This one spares you the hunt by fixing where you land.
A board that does leave the burden to the builder lands on the same ratio. terrariaking publishes a DRSSTC driver on OSHWHub and states the threshold as a formula rather than a number: "阈值电压（lm393的3脚电压）=(要设定的过载电流/互感器匝数)采样电阻阻值", the voltage at the comparator's pin 3 being the overcurrent setting divided by the transformer's turns and multiplied by the sampling resistor. The board fits 10 Ω there and notes "R5=10Ω时1V≈100A"*, one volt for about a hundred amps. A hundred amps through N into ten ohms making one volt needs N = 1000 [derived]. A hobby board in another language, with no datasheet convention to follow, arrives at 1000:1 as well, and the two agreeing count for more than either alone.
The feedback ring also has a direction. Get it backwards and the machine does not run at all. The sheet's phase select switch "allows the user to reverse the phase of the output gate drive with respect to the phase of the primary feedback current", and it says the switch "has the same effect as reversing the wires (or direction of the primary lead) of the feedback current transformer". Its instruction applies to any board: "if during initial testing, you find your DRSSTC system is not self-oscillating and switching, to simply power down the system and change the phasing". A coil that will not start may just have its feedback ring the wrong way round, and that takes two minutes to check. It is a sign reversal rather than a phase error to trim, and no amount of lead inductance corrects it.
One more line from that sheet applies whatever board you run: "Be sure the wires between the current sense transformer and the controller are twisted tightly together to maximize coupling and reduce inductance." Both rings feed low-level signals across a machine that is radiating hard, and the twist keeps the run between ring and board from becoming a third winding.
Where to put it
Where the potential is low. Ward allows for a second option in the guide linked above: "This design uses primary current feedback as the basis, but could also work from secondary base-current feedback if so desired." His next sentence says he prefers primary feedback. A ring on the ground wire at the base of the secondary reads secondary current instead. The case against it concerns the drive signal. The protection sits on its own primary ring either way. Under a ground strike the secondary jumps to a harmonic of its own resonance, so a loop reading secondary current loses its reference at that moment. That is what a ground strike does to a DRSSTC, and it is the reason the feedback comes off the primary.
Wound the wrong way round, the feedback gives you zero or chaos. Turning the ring over is the test, and it costs nothing, so try it first.
What will get you
Only one of the two can be probed with an ordinary probe. The feedback burden has ground on one side of it. The overcurrent burden has ground on neither side and needs a differential probe. A signal generator also delivers orders of magnitude less current than a primary does, so to test a ring on the bench, wind ten to a hundred turns through it to get any signal at all.
The numbers
- Ratio in use: 1089:1 on Ward's DRSSTC-1, two cascaded cores at 33 turns each, with a second pair of the same for the limit. No ratio is published for the board the burdens below come from.
- Burdens on a UD board: feedback 51 Ω 2 W, overcurrent 5.1 Ω 0.5 W.
- Feedback strength on working boards: 0.02 to 0.04 V/A.
- Phase error at 51 Ω: a few nanoseconds, up to four per cent of the whole lead, and it subtracts. At 3.6 Ω it is negligible.
What goes wrong
- The coil will not start, or the frequency is nonsense. Winding direction. Turn the ring over.
- The protection is weak at exactly the current that matters. One ring doing both jobs, with the lead network saturating its core.
- It tracks at low power and stops tracking at high. Clamping, from a feedback strength three or four times what it should be.
- The transformer failed with a hole in its insulation. It was between the tank capacitor and the primary, at kilovolts.
- Bench tests on a signal generator show nothing at all. Not enough current. Wind more turns through the ring.
Where next
- Inside the driver, which is what these two signals go into.
- Overcurrent is not a setting, the protection side in full.
- DRSSTC phase lead: what it is made of, which inductor to fit, the network that loads the feedback ring.
The two rings on the DRSSTC diagram are drawn and labelled separately because of the phase lead loading described at the top. On the QCW page, taking the tank capacitor out removes the overcurrent ring and leaves the feedback one.
- Feedback strength does the
|Z| / Nabove and gives the primary current at which the loop takes over from the oscillator, which is a more useful number than the turns count. - CT timing works out the two stages' terms of the phase error for your burden and your cores'
A_L(or a measuredL_m), and how much of the lead you need they already give. - Where the feedback comes from, the three places the signal can be taken from and the failure that sorts between them.