The switch family sets the frequency you can run and how long the bridge lasts. There are three to choose from, IGBTs, MOSFETs and SiC, and whatever one of them gains you is paid for somewhere else in the machine.
What decides it
Conduction loss is the simplest part. A MOSFET's loss is I²·R, quadratic in current. An IGBT's is V_ce·I, linear. So at hundreds of amps in short pulses the IGBT wins, and at moderate current and high frequency the MOSFET does.
Switching loss is where SiC comes in. Its losses are far below either. A builder running a phase-shift ramp puts them well under an IGBT's, and they are low enough to make topologies that hard-switch all the way up a ramp practical. The two datasheets used here put a size on it: the Warp2 IGBT spends 1060 µJ a transition at 33 A, 390 V and a 125 °C junction, while the SiC part spends 75 at 13.2 A, 400 V and a hotter 175 °C. Per ampere switched that is 32.1 against 5.7 µJ, a factor of 5.7 [derived, each total over its own stated current], and the test conditions favour the IGBT.
The price of SiC is its body diode, which sits in the resonant path, and a much stricter need for soft switching, because its turn-on energy is the large one.
What you decide
Which type
Choose on the current first, then the frequency.
- An SSTC takes MOSFETs. There is no resonant primary, the current is modest, the switching frequency is as high as a DRSSTC's, and an IGBT's current tail would be the largest loss.
- A DRSSTC takes IGBTs. Hundreds of amps in a tank, in short bangs, is what they are good at.
The ceiling for IGBTs is a few hundred kilohertz. Above that the switching loss and the current tail kill the device. For megahertz you are looking at SiC or a valve.
Which family, within the type
Field-stop IGBTs are the de facto standard for QCW. The old trench bricks without field-stop, the CM300 and CM600 family and their relatives, are good for an ordinary DRSSTC and lose on long ramped pulses, both thermally and on switching.
A builder who does fit them ranks the frequency ceiling below the load. 林雪猁, who moderates the Chinese Tesla board, publishes a full build guide for a module bridge on two CM300DY-24H and offers it as the drop-in replacement for a bridge of TO-247 parts (tieba 10540490049). On frequency he says not to worry: in his words, translated, the thing runs far more stably over-frequency than over-load, for Tesla coil work specifically. He limits the claim himself to arcs of two metres or less, so take it as which margin gives first on a pulled module, and not as licence to go past the ceiling. The same post gives the reason these bridges get built, and it is cost rather than performance. Scrapped modules are now cheap enough that a beginner stops losing time to dead switches.
The rest of the guide is a parts list. It is useful because it shows what the ordinary Chinese-market bridge is made of: a 160 × 250 × 40 mm heatsink, 5600 µF or more of bus at 400 to 450 V, a 2 µF 1200 V snubber across the module, a 1600 V 100 A rectifier block, three 330 kΩ 5 W resistors in parallel for the bleeder, and 3 × 15 mm copper bar for the busbar. One reader proposed an IXFH54N65X3 in place of the module and was told it is too small to bother with.
We could not reopen that thread to check it. tieba.baidu.com answers a fetch with 403 and a browser with a slide-puzzle challenge, so the guide was read when these notes were made and not since. The link stays because a reader in the right place may get through. Everything above rests on that one source, so it is used only as a parts list and as one practitioner's ranking of two margins, not as a figure to argue from.
Superjunction MOSFETs are poor in a high frequency resonant circuit. Their non-linear Coss gives voltage overshoot and low efficiency even under soft switching.
What the family costs at the gate
The gate rail is different for the three families, and on an IGBT it is part of the conduction loss in the first section.
Published builds line up when you put the rail against peak primary current, though only two of the three rows give a current:
20 V 100 to 126 A Gao's QCW loneoceans.com/labs/qcw/
±24 V 145 to 160 A his QCW 1.5 loneoceans.com/labs/qcw15/
30 V none stated Steve Ward stevehv.4hv.org/drsstc_design.htmGao states both of his rows on his own pages: a "6:5 primary : secondary ratio for 20V gate drive with 24V on the primary" against a primary that "goes up to about 126A just below my current OCD limit", and on the later machine "a +-24V IGBT gate drive from my UD2.7" against a peak that "hovers between 145 to 160A". That second row is the bridge only. The same page also drives a brick "with conventional +15 -8V drive voltages", so the machine runs two rails at once.
Ward explains the top row: "To further exploit the pulse capabilities of the IGBT, we drive the gates to a higher voltage (30 V is typical). This lowers the volt drop, and keeps the IGBT in saturation even at extreme conduction currents." He means higher on purpose, knowingly above the 15 V ±10 per cent the makers recommend. It is a pulse-mode technique that trades short-circuit margin for a lower saturation voltage at extreme current.
His page gives no current for his own coil. This row used to carry a thousand amps, but that figure is a worked example in his limiter section, not an operating point, so it has been taken out. Two rows of the table are machines and the third is a practice.
This changes how to read the V_ce·I in the first section. It depends partly on how hard the gate is driven, and an IGBT on a rail chosen for some other reason pays a conduction loss that nothing on its datasheet accounts for.
There is also a reason to keep the rail low. The gate loop wants it low: ±12 V instead of ±15 shortens the swing by twenty per cent, and the part of the dead time that comes from slew rate shrinks with it. Ward wants it high, for saturation voltage. Both are right and they pull opposite ways, so pick the rail by whichever loss the machine is actually short of. We have no source giving the same pair of limits for SiC, so for a SiC bridge take the rail from the part's own sheet.
Whichever rail you pick has to be delivered. On a ramped coil the gate supply is a real supply sized on Q_g·f, and whether it arrives through a transformer or through an isolated DC-DC per floating rail is its own decision. The family affects that choice. A driver brings desaturation detection and an active Miller clamp, and a transformer has no silicon at the switching node to lose.
Whether to parallel
What matters is how evenly the array shares current, and that depends on the layout more than on the devices in it.
Budget no more than fifty per cent extra for a pair, and only when three things are true: the devices are matched, they share a heatsink, and their gate drives are identical. A different gate delay means one of them takes all the current.
The underlying mechanism is thermal. The hotter device drops less voltage, so it takes more current, so it heats further. That is current hogging, the same runaway that kills one diode of a parallel pair and leaves its twin looking untouched, and it is why the symptom is nearly always one dead part rather than two. That reasoning is ours, and the bus page makes the same argument about diodes.
Geometry matters as much as temperature, and a shared gate path matters more than either. An array of 72 thyristors on a common gate drive bus destroyed itself when one part's breakdown fired all the others at the wrong moment (HVF 2230). Those are different devices with a different imbalance, but the lesson carries over. An array is limited by how evenly it shares, and a derating figure quoted per device tells you nothing about that. A single part's rating belongs to the part. An array's usable current depends on its layout.
What will get you
The large figure on a datasheet's first line is a pulsed current, at a stated temperature, under hard switching, usually specified over one millisecond. It does not tell you the device will survive in your coil, and for a softly switched DRSSTC the limit is a separate calculation.
SiC also changes what the phase lead is for. Turn-on energy on a SiC device is much larger than turn-off energy, the reverse of the IGBT case, so soft switching becomes the main reason to use the part rather than a matter of efficiency. In Anders Mikkelsen's words, phase lead achieves ZVS and that is "especially critical with SiC due to E_on being much larger than E_off". The same sheet puts a ratio on it: 70 µJ of turn-on energy against 5 µJ of turn-off, both at 400 V and 13.2 A with the junction at 175 °C, which is fourteen times [derived]. A bridge that would just run warm on IGBTs with sloppy lead can be the wrong machine entirely on SiC, and the ZVS floor works that out.
The resonant bridge is not the only case. A coil ramped by phase shift hard-switches all the way up the ramp, so the cost is switching rather than diode conduction, and there SiC wins by a lot. Anders Mikkelsen, answering a question about exactly that on HVF 3097, says the hard-switching losses during ramping follow the sine of the phase shift angle, approach zero at 180 degrees, and "compared to IGBTs, these losses are lower with SiC by a factor of between five and ten". He is speaking from his own coil, not a datasheet: two SiC TO-247 devices running a line-cycle ramp, which davekni on the same thread calls possibly a record for input power from a pair of TO-247s. The diode argument above decides the resonant case and not the ramped one, and a single answer for both is too general.
The numbers
- The crossover:
I²RagainstV_ce·I. Hundreds of amps in pulses favours the IGBT; moderate current at high frequency favours the MOSFET. No figure is given here for either term, because both are yours:R_DS(on)at the junction temperature you will actually run, andV_CE(sat)at your peak current and at the gate rail above, neither at the sheet's headline conditions. Two numbers off two datasheets decide it. A rule of thumb will not. - IGBT frequency ceiling: a few hundred kilohertz.
- TO-247 dependable peak: 250 to 300 A, and 250 for a long ontime. A named machine sits at the top of that: Daniel Kramnik's 3.5 inch DRSSTC runs an H-bridge of FGA60N65SMD in TO-247 with the over-current setpoint at 300 A, and he says outright that he would need to move up in size to go much past it. The rule of thumb and a builder's own ceiling agree.
- Paralleling: budget 1.5 times one device, not 2.
- SiC body diode forward drop: 5.1 V at 25 °C on the C3M0060065K, at
V_GS= -4 V andI_SD= 6.6 A. The drop is the smallest of its three problems. Minority carrier buildup and bipolar degradation come with it, so the cure is a short dead time rather than a bigger heatsink. - SiC hard-switching loss against an IGBT's: a fifth to a tenth, on a builder's own phase-shift coil.
- Voltage margin: a part rated at least 1.5 times the highest voltage that can reach the bridge. It is a floor, not a range. On an ordinary DRSSTC that voltage is the bus, so the rule usually gets written against the bus: from 320 V, 600 V parts. Where something between the bank and the bridge limits what arrives, the multiplier goes against that limit and not against the bank, as in the second paragraph below. Lead inductance then adds overshoot at the die on top of either. One bench switching 140 A peak from a 320 V bus measured a 55 V emitter spike and a 50 V collector spike, 105 V added to the internal
Vce, on a device rated 650 V, which is 2.0 times that bus. It reports the die peaking near 700 V (HVF 2498). Those figures do not add up on their own: 320 plus 105 is 425, so the terminals were already near 595 V before the package added its share [derived from his 700 and 105]. That bench had more margin than this rule asks for, and the die still went past its rating.
Here are the published machines against that floor. Written as a fraction of the rating instead of a multiplier, 1.5 times is a bus of at most 67 per cent of the part's voltage [derived, 1 over 1.5], and that is the column to read:
loneoceans 340 V on 600 V 57 % [derived, all rows]
Kramnik 340 on 650 52
TMaxElectronics 350 on 650 54
Jan, SiC 800 on 1200 67 exactly at it
Mikkelsen QCW II 900 on 1200 75 above
1350 on 1700 79 above
this site's QCW 440 on 650 68 just aboveTwo more clear it on the bus figure alone, davekni at 240 V and flyglas at 340, but we do not have the device rating each was running, so they are not in the table. SiC has different spike and avalanche behaviour from the IGBTs the rule is usually quoted for, so Mikkelsen sitting outside it shows a gap between rule and practice rather than a fault in his design.
On our own arrangement the same ratio on a 650 V part is 433 V, and the buck is held at 440 [derived], seven volts over. The paragraph after next explains why that shortfall is deliberate.
The voltages here describe a class of machine, not a law of physics. A 320 to 340 V bus with 600 to 650 V parts is what a coil fed from rectified single-phase mains ends up with, sometimes through a doubler. That covers most of what gets published but not everything that is built. Where the bus goes higher and nothing stands between it and the bridge, nothing above changes: the multiplier does the work and the part number moves with it.
What people actually fit for a QCW at 420 kHz and up, from one builder's bench, so check it on yours: IXXH75N60C3D1 and STGWA75H60DFB2 gave a strange waveform and were unreliable; AOK75B60D1, AOK60B65H2AL, FGA60N65SMD and IRGP50B60D1 worked.
What goes wrong
- Devices die weeks in, for no visible reason, well below
Tjmax. The cause is the size of the temperature swing rather than the peak. It tears bond wires and die attach over thousands of cycles, and it is covered with the bridge. - One device of a paralleled pair runs much hotter. That is gate drive mismatch, and the hot one is taking the current.
- An IGBT will not turn off. That is latch-up from a high collector current.
- Voltage overshoot and poor efficiency despite soft switching. That is superjunction
Cossnon-linearity, the wrong family for a resonant circuit. - A SiC upgrade performed worse. The body diode is in the resonant path every half cycle, and the dead time was left where the IGBTs had it. On SiC that window is the one to shorten.
- A device survived the bench and died on the arc. The datasheet number was a hard-switched millisecond pulse, not your duty.
Where next
- The bridge and what kills it, for the failure mechanism in full, and for the half or full question, which is the decision above this one.
- A pulse rating is a temperature, which works the datasheet pulse figure all the way out: where it comes from, and how far past it a builder will actually run a part.
- Reading a gate waveform, because an over-damped or ringing gate puts any of these devices through its linear region several times per transition.
Every department diagram draws the bridge out rather than boxing it, because whether it is a full bridge or a half is the first decision, and what is in each leg is the second.