A QCW bridge switches for ten to twenty five milliseconds without a break. An ordinary DRSSTC bang lasts a few hundred microseconds. Over the longer bang the gate charge adds up to around an amp of average current, so the gate supply has to be sized like a power supply.
Q per ramp = Q_g × (devices) × (transitions per cycle) × f_working × t_rampThe three factors people leave out
- Count the charge over the full swing. On a bipolar ±24 V supply the gate travels from -24 to +24, not from 0 to 24. The datasheet's
Q_gis quoted for a stated swing and has to be scaled to yours. - Both devices in a leg. While the supply is charging one gate from -24 to +24, it is discharging the other from +24 to -24.
- Twice per cycle, not once.
The order of magnitude
Take a bridge device at about 400 nC over the full swing, running at 400 kHz with a 25 ms ramp. The 400 nC is davekni's, an FGH75T65SHD's gate charge extrapolated to ±24 V in that thread, and the 400 kHz and the 25 ms are his assumed figures too. This part is smaller than the buck's own switch, and the brick's charge is on the record rather than estimated. The reference build's buck switch is an FF300R12KS4, which Gao names with its charge beside it, "3200nC gate charge" (loneoceans), and Infineon's own datasheet for that module gives QG = 3.20 µC at VGE = -15 V to +15 V. So the bridge device carries about an eighth of the brick's charge [derived, 400 nC against 3200], over a wider swing than the brick's figure was measured on.
That swing is past the part's rating, so treat the budget below as a ceiling. The FGH75T65SHD's absolute maximum |V_GE| is 20 V, with 15 V as the operating figure on its data sheet, and ±24 V is a 48 V swing against a 40 V limit. No one is proposing to drive it like that. The extrapolation is a way to get a charge figure, not a drive design. Every figure below scales with it, so at the rated ±20 V they come down to about 83 per cent and at the ordinary ±15 to about 62 [derived, by swing]. Those are upper bounds on the reduction, because the Miller plateau is a fixed part of the charge and does not shrink with the rails. The order of magnitude and the shape of the demand are unchanged by the factor. For two devices, so a half bridge or one leg of a full one:
- counting only the charging of both gates: 8 mC per ramp, 0.32 A average, 4 mF for a 2 V sag;
- counting charging and discharging: 16 mC, 0.64 A, 8 mF.
A full bridge is two of those, and davekni's own answer is the doubled one. He runs the same 400 nC, 400 kHz and 25 ms across four devices, 1.6 µC a switching event and twice per cycle, and gets 32 mC over the ramp, 1.28 A and 16 mF for the same 2 V sag. Count the legs you have before using either column. Counting one leg and halving the figure is the same kind of mistake as the three above.
The numbers come out in amps of average current and millifarads of capacitance. A 100 nF cap near the driver does not cover it.
And what a rail that sags actually does
A sagging gate rail shows up as a coil that cuts out partway through the ramp. The droop follows from the charge and the reservoir:
dV = Q / CTake one leg's 16 mC and put it against a reservoir chosen for a different job. At 4 mF that is a 4 V droop over the ramp. At 1 mF it is 16, and both double for a full bridge. The gate rail doesn't fall off a cliff. It sinks steadily for twenty five milliseconds.
When it gets low enough the result is abrupt, because the driver watches that rail. UVLO sits a few volts below the nominal, so a supply sagging by more than that doesn't just slow the edges. It switches the driver off part of the way through the bang, mid-ramp, where the arc is longest and the bus is highest. The bridge stops driving while the tank is still full.
Size the reservoir for more than clean edges. It has to be enough that the droop stays under the UVLO's margin for the length of the longest ramp you intend to fire. That is a larger number, and it is the one to design to.
Local beats large
A local electrolytic, something like 470 µF, plus a fast ceramic bypass right at the pins, delivers current before the supply cable's inductance has time to notice. A big bank at a distance does not save you, because the cable is in the way.
470 µF is much less than the millifarads above, and that is fine. Those capacitance columns are what the bank has to be if the supply hands over nothing while the ramp runs, which is davekni's own condition on them. If the supply does keep delivering, the requirement becomes a current instead, 1.28 A held for the length of a bang. For that he advises a regulator of at least 1.5 A and better 2 A, and the local can is then only there to cover the cable. Decide which of the two you are building before sizing either.
What that means on the board in front of you
Most of these coils are built on the UD2.7 driver. Gao Guangyan documents the UD2.7's own supply on his page: the reservoir is the pair C4A and C4B, "the default values for C4A/B at 8mm diameter 35VDC 220uF capacitors", with a third position, C4C, added on the Rev B and C boards, and the board wants "19 to 26.5VAC recommended input, with 18-28VAC absolute limits" or a 24 V DC supply. On how much is enough he gives an instruction rather than a rule: "a roughly 30VA power source should be sufficient for most coils, but you should calculate the total gate drive power required to be sure."
So calculate it. Four hundred and forty microfarads against the charge from the section above, on a 24 V rail:
one leg full bridge [derived, Q/C]
C4A + C4B, 440 uF 36.4 V 72.7 V
at the rated +-15 V 22.5 V 45.1 VThat is more than the whole rail. It is fine for the machine the board was drawn for: a DRSSTC bang is over in a few hundred microseconds and 440 µF is generous for it. The same board on a twenty five millisecond ramp is a different case, and the numbers show it before anything smells hot.
Gao covers this case himself, on the same page. "Add extra bus capacitance on the 24V rail... I found adding an extra 1000-5600uF capacitor works great depending on your application", together with "use a 24V switch mode power supply as a power source (instead of a 20V transformer)". Take the top of his range:
440 uF + 5600 uF = 6.04 mF one leg 2.6 V full bridge 5.3 V
at the rated +-15 V 1.6 V 3.3 VCompare that with the two options above. Six millifarads is 38 per cent of the 16 mF full-bridge column [derived], and that column assumes the supply hands over nothing while the ramp runs. He doesn't try to meet it. He changes the supply from a transformer to a switch mode unit, which is the current option, and then fits enough capacitance to cover the cable and the gaps rather than the whole ramp. It is the same choice described in the previous section, made by the person who drew the board.
Two cautions. The 1000 to 5600 µF is his range for his applications, not a specification: he says it depends on yours, and the droop columns tell you which end of it you are at. Also, the figures above are one leg and one full bridge at davekni's 400 nC, 400 kHz and 25 ms. A different device, frequency or ramp moves every number in proportion, using the same formula from the top.
And the buck's own switch
The buck's gate supply has two traps of its own, and both kill parts without much warning.
There is a third, at the switching frequency. The average gate current is Q_g · f and grows linearly, so how soon a module runs out depends on which rail it is driving. On that 3.20 µC brick and a symmetrical ±15 V, a two watt isolated module is used up at about 21 kHz, and 60 kHz asks 5.76 W, more than a five watt module covers. On a single +15/0 rail the same switch does not reach two watts until about 42 [derived, Q_g · f · swing, all three]. Do not carry the ±24 V of the bridge above into that sum. The rows, the asymmetric rail between those two, and why all of them are ceilings rather than values are covered with the choke, since that is where the frequency choice gets paid for.
The gate transformer on the QCW diagram has the driver coming up into it from below and the gates coming down from above. This is what has to sit behind the driver's own supply pin for a ramp that lasts twenty five milliseconds.