The margin is in the loop, not on the bus

A bridge is specified against its bus, and the bus is the one voltage in it that nothing is actually stressed by. What the silicon stands off is the bus plus whatever the loop of copper around the switch adds during the few nanoseconds the current changes hands. That addition is on no datasheet and is not set by the supply: on the best laid published bench it was 275 V on top of a 320 V bus at the package terminals, and more again by the time it reached the die. You cannot compute it. You can measure it at a low bus for the price of a bench supply, and what to multiply that reading by is the thing the people who took these measurements do not agree on.

What it is and how it works

When a switch opens, the current it was carrying does not stop. It goes to the next path available to it, usually a diode somewhere else in the circuit or a capacitor across the rails. The go and return path joining the switch to that next thing is the commutation loop. It is a real loop of copper, it is there whether or not anybody drew it, and every turn-off in the circuit runs a large current change around it.

A loop of copper is an inductor. What sets its inductance is the area it encloses, which is to say the gap between the outgoing conductor and the returning one. Thickness barely enters into it: piling solder onto a trace makes it a better conductor and almost exactly as good an inductor. Inductance is a property of the drawing, not of the metal.

An inductance whose current is being taken away does not allow it to be taken away quietly. It answers with a voltage, the inductance times the rate of change, and that voltage sits in series with the loop and adds to whatever the switch was already holding off. That is the overshoot. It lasts as long as the current takes to fall and no longer, which is why it is short and hard to probe. Then the loop rings, because there is capacitance at each end of it: the switch's own output capacitance, plus anything deliberately fitted across the device.

v_step = L · di/dt          while the current is falling
v_ring = I · sqrt(L / C)    how big the ringing that follows is

Two things follow, and the rest of the page is those two things. The size of the step is set by the current and by the loop, not by the supply. And the ring after it is set by the capacitance loading that loop, part of which is the switch's own and part of which is whatever else sits across the rails, and nothing below settles which of the two dominates.

What it does in a coil

In a bridge the commutation loop runs from one device's terminals, through the film capacitors sitting across the rails, to the opposite device and back. There is a second, larger loop behind it, from those film capacitors out to the bulk electrolytics. davekni separates them exactly that way and says which one does what: the first carries the fast switching and diode recovery spike, the second carries the ring that follows an overcurrent trip. Keep the two apart, because the rules for scaling them are not the same rule and the difference is most of the argument below.

The site's rule for silicon is a ratio against the bus: a part rated at least 1.5 times it, which is a floor and not a range. That rule is sound and it is not the calculation. It reckons against the one voltage in the bridge that nothing is actually stressed by, and the quantity that decides whether the die survives is the one the rule does not name.

The measurement, and it is cheap

You cannot compute the loop. You can measure what it does, and the measurement costs a bench supply.

Run the bridge at a low bus with the tank in place and scope the collector to emitter voltage of a low-side device. Read the peak. Divide it by the bus you ran it on. That ratio is what the loop does to your bridge, and it is available before the coil has ever seen the mains. davekni uses the same dodge for the same reason: asked to repeat his own lead-length test, he answers that "to run with longer leads requires testing at lower current and/or voltage", and then repeats it at 80 A on a 180 V bus rather than at 140 A on 320 V.

How to get the probe on it without killing the scope or the driver is its own page, and it should be read first.

What to multiply by, and the sources do not agree

Two scaling rules exist, and the builder who states the current rule states it about only one of the two features on the waveform.

Reading AstRii's scope shot in HVF 1196, davekni attributes the slow ring to the film-to-bulk interconnect and writes, of that: "If it is as I'm guessing, that ring amplitude will roughly track current, with bus voltage having little effect." Both halves matter. The rule is hedged on his own guess about where the ring comes from, and it is about the ring. The last sentence of the same post hands the other feature to the other rule: "The shorter switching spikes do depend more on IGBT capacitance, which changes with voltage as you know."

So the ring scales on current, and the fast spike carries a voltage dependence through the device's own capacitance. Nobody in these threads gives a number for that second dependence, and this page does not invent one.

The bus is a stand-in for the current, and a fair one for the first rule, because on either kind of machine the primary current follows the bus while nothing is clipping. On a doubly resonant coil at a fixed ontime the tank rings the current up in proportion to the voltage driving it. On an SSTC there is no tank and the primary is a transformer winding in front of an impedance, so the current is the bus divided by it. Either way the bus ratio and the current ratio are the same number.

Where they part is the overcurrent detector. It caps the current, so the current ratio is smaller than the bus ratio, so multiplying by the bus is the conservative of the two. Use it, and know what its licence covers: it is a proxy for current, so it says nothing about the capacitance term, and at a low bus the capacitance term is at its largest. That is where the disagreement in the numbers below sits.

Soft or hard, because the coefficient moves

A DRSSTC with phase lead turns its devices off at a small residual current, so di/dt at the handover is small and the overshoot is a fraction of the bus. A hard turn-off dumps the full current into the loop, and the two published benches below put that between 1.8 and 2.4 times the bus, read at the device terminals.

What you buy with the answer

If the number comes out over the device rating, there are two things to spend money on and they are not equivalent.

• The loop. Overlapping planes for the two rails, high side and low side close together, film capacitors at the pins. That is the layout list on the bridge's own page, and the two corrections worth repeating here are Hydron's, that the critical connection is the one between the two devices of a half bridge and not the one between half bridges, and davekni's, that trace thickness has almost no effect on inductance while turning the same traces into overlapping planes can cut it to about a tenth.
• The silicon. Buy the rating instead. It works, it is what AstRii did after losing two bridges, and davekni's comment on doing it is worth having in writing: his preference is to scope signals and fix specific causes instead.

A snubber is the third thing people reach for and it does something subtler than advertised. On davekni's bench the RC snubber did not shrink the inductive spike at all. It slowed the rise of Vce so that the spike, which happens while the current is falling, arrived while the device voltage was still low, and so stopped adding to the peak. That is a real fix and it is not the fix people think they are buying. What it costs is a separate bet.

The numbers

Four readings on three machines, and every one of them is somebody else's.

AstRii's 30 volt bench, and the multiplication the thread argues about. A mains SSTC on a UD2.7, oscillating at about 250 kHz, tested at 30 V DC while he designed a snubber for it (HVF 1273). Read it as a hard turn-off: an SSTC's primary is not tuned, so nothing brings the current to zero for the devices and they open into whatever they are carrying.

no snubber, 30 V bus       70 V spikes on the low-side Vce
22R + 4.7n, 30 V bus       around 55 V
1R + 22n, 30 V bus         pretty much no spikes

Seventy over thirty is 2.33 times the bus [derived, 70 ÷ 30], measured at the package terminals. Take nothing else from this bench and that ratio is still worth the afternoon. Applied to that bench, the site's 1.5 floor asks for a 45 V part, and the bridge is standing off 70.

He names his own working voltage in the same post, writing of the snubber resistor "at only 30V, imagine 325V". Do that to the spike instead of to the resistor and the arithmetic gives 758 V on a 325 V bus [derived, 325 × 70 ÷ 30] unsnubbered, and 596 [derived, 325 × 55 ÷ 30] snubbed. The site's margin rule, 1.5 times a 325 V bus, is a floor of 487.5 V, so 600 V parts clear it: 758 does not fit under a 600 V part, and 596 fits by four volts, which is arithmetic rather than margin.

Two people in that thread say the reading will not scale like that, and this page does the multiplication anyway, so here is the argument rather than a summary of it. AstRii raises it against himself, in the parenthesis attached to the very reading being scaled: "(The coil is tested at only 30VDC so the spikes may be only from C-E capacitance of the IGBTs.)" Mads Barnkob puts it harder, and in the opposite direction to this page: "Low voltage testing is deceiving!", and, having sent him to the capacitance against voltage graph, "So these switching transients will get lower at higher C-E voltages!" davekni is the one who takes this page's side, and only about the cause rather than the direction: "I agree, this doesn't strike me as primarily due to capacitance."

So read 758 and 596 as arithmetic on a measurement rather than as a prediction about that coil. The measured 2.33 is what the bench gives. Which way it moves as the bus comes up is the open question of this page, and the thread it comes from leans the other way from the answer this page gives.

The loop that produced it. T3sl4co1l reads the inductance straight off the ringing rather than off the layout: "Evidently your loop has 116nH in it (a resonant frequency of ~3.3MHz with ~20nF loading, and 1 ohm being less than sqrt(L/C)), which is awfully high. Consider redoing the layout." The arithmetic checks: 116 nH with 20 nF rings at 3.30 MHz [derived, f = 1/(2π·sqrt(L·C)) on 116 nH and 20 nF], and the route run backwards returns 116.3 nH [derived, L = 1/((2π·3.3 MHz)²·20 nF)].

His sizing rule is "C >= 2.5 Coss and R = sqrt(Lstray / Coss)", and he adds "Which also puts sqrt(L/C) ~ 5 ohms, so the 4.7 ohms suggested is likely close to optimal." Which C he fed it he does not say, and the two candidates in his own sentences are a factor of two apart: the 20 nF loading he has just named gives 2.41 ohms [derived, sqrt(116 nH / 20 nF)], and a Coss of a few nanofarads gives about 5, taking the thread's own 4.7 nF as the stand-in [derived, sqrt(116 nH / 4.7 nF) is 4.97]. Only the second reproduces the figure he quotes, so that is presumably what he meant, and it is an inference and not something he wrote. This page is not the first to hit that ambiguity: the snubber page puts the same rule against a QCW device and finds the answer moving 3.1 times depending on which capacitance you feed it, and concludes the rule does not say which reading it wants. It is the same sqrt(L/C) the gate side of the machine is sized on, on the gate loop's page, doing the same job: turning amps into volts.

The sentence before his last is the one that bears on which way the bench reading errs. "Coss is a few nF for most IGBTs of useful size; it will decrease at higher voltages." That the capacitance falls is agreed by everybody in both threads. What it does to the spike is not: on I·sqrt(L/C), less capacitance is more volts per amp, which is this page's reading and this page's inference alone. Mads Barnkob reads the same falling capacitance as the reason the low-voltage transients are an artefact that will shrink. Neither reading has a measurement behind it in these threads.

davekni's 320 volt bench, with the layout done properly. Copper foil on both sides of 1 mm polycarbonate, the package body against the board edge for under a millimetre of external lead, switching 140 A to 0 at 320 V (HVF 2498):

emitter spike, lead to lead      ~55 V, about 12 ns wide
collector, package back to foil  ~50 V
added inside the package         105 V
peak at the die                  about 700 V, on a 650 V part

The comparable figure to AstRii's is the one at the same place on the device. Subtract the 105 V the leads inside the package add and the terminals peaked at 595 V [derived, 700 minus 105], which is 275 V of overshoot on a 320 V bus and 1.86 times the bus [derived, 595 ÷ 320]. AstRii's 2.33 was also read at the terminals. So the two benches, sharing no part, no bus and no topology, give 1.86 and 2.33, a spread of about a quarter.

The die figure is 2.19 times the bus [derived, 700 ÷ 320], and it has nothing to be compared against, because nobody probed AstRii's die. Do not put 2.19 beside 2.33: that is a die reading against a terminal reading, and the 105 V between them is inside the epoxy rather than in the copper this page is about.

What both benches do carry is the same verdict on the rating rule. A part bought at the 1.5 floor from a 320 V bus is a 480 V part, and this bridge, built about as well as a bridge can be built, put 595 V on its terminals before the package added anything.

One limit on that bench, and it is davekni's own. It is a test fixture and not a bridge: he describes the loop as diodes soldered to copper foil and in series with current-sense resistors, so some of the 275 V belongs to instrumentation that a working bridge does not have. Of the same rig, when he came to use it for the lead-length comparison below, he says it "isn't completely representative of normal H-bridges", and that the difference runs against the real bridge rather than for it, because in one the freewheel diode lives inside the opposite device and that device's lead length would add on top.

The device page reads this same bench as a rating question and puts the 650 V part at 2.0 times that bus. That is the rating over the bus. The 2.19 above is the die peak over the bus and the 1.86 is the terminal peak over the bus. Three quantities, one phrase, so check which one a figure is before carrying it off either page.

And what five millimetres of leg is worth. alan sailer asked whether moving the device away from the board would show the expected increase, and davekni went and measured it, at 80 A and a 180 V bus to keep the test survivable: an additional 40 V of collector spike and about 17 V of emitter spike across the extra 5 mm. He then scales it himself, the plainest statement of the current rule on this page: "Differences would be ~75% higher at the previous test conditions of 140A compared to this 80A test." That is 140 over 80. So the same five millimetres is worth 70 V at 140 A [derived, 40 × 1.75].

AstRii's DRSSTC, and the reading that went unmultiplied. FGY75N60, 600 V, on a 340 V DC bus, UD2.7 with phase lead, 200 kHz, 60 us ontime and the OCD at 200 A, which he says was "active pretty much all the times" (HVF 1196). Margin against the bus: 1.76 [derived, 600 ÷ 340], comfortably over the site's 1.5 floor. He had also scoped it from an 80 V isolated supply and reported the inverter output "with 100V peaks", so 20 V of overshoot on an 80 V bus. The current at which that was taken has two candidates and they are both guesses: AstRii puts it at about 100 A peak and says he has lost track of the scope's scaling, and davekni, looking at the same shot, asks "If this is +-140A".

bus ratio, 340 over 80            4.25   ->  85 V     ->  425 V at the device
current ratio, 200 over 100       2.0    ->  40 V     ->  380 V
current ratio, 200 over 140       1.43   ->  28.6 V   ->  369 V

All three [derived] from his 20 V reading and the ratios in the left-hand column. The bridge carried a 1.5KE440CA across the low-side device, and he read its datasheet afterwards: it "actually starts to conduct at 418V already", which is 1.23 times that bus [derived, 418 ÷ 340]. The bus-ratio figure clears the clamp's conduction point. Neither current-ratio figure does, whichever guess at the current you take. The TVS conducted enough to explode, so on the night the machine ran the bus ratio was the closer of the two guesses.

davekni does that current scaling himself in the same post, and it is worth crediting rather than presenting him only as the source of the principle: "If this is +-140A, that ring will be less than double at +-250A OCD." Less than double the 20 V is under 40 V on top of the bus, so under 380 V at the device. His pair of currents is not quite the machine's, since the coil that failed had its OCD at 200 A rather than 250, and the 140 A is his guess at a shot AstRii read as 100. Pair them any way you like and the current route stays below the clamp.

Which is a result and not a proof, because the third possibility beats both. That OCD sat at 200 A and was, in his words, "active pretty much all the times", so most of what the loop saw was not a soft handover scaled up at all. It was a hard turn-off at the setpoint, on every bang. Neither column above describes that, and davekni's first reply is exactly that reading of it.

AstRii's own reading of the bench shot went the other way entirely: "I'm assuming the voltage spikes will get lower and lower at higher input voltages as IGBT's C-E capacitance decreases (but then nothing explains the destruction of the 440V TVS)". That is the same argument Mads Barnkob made in the other thread, and this page takes the opposite view of the same falling capacitance without a measurement to settle it. What is not in dispute is his parenthesis: the thing that explained the destruction of the TVS was the line above it in his own thread.

What will get you

What goes wrong

• Ran fine for months at reduced mains, died the first time you raised it. Every voltage in the machine multiplied together, including the one the datasheet was checked against. Take the bench ratio and multiply it too.
• The TVS or clamp exploded, and devices in the same leg are short. The clamp was conducting below the device rating, fired repeatedly on loop overshoot, and failed short across the device.
• Devices die only when the coil is running hard, never at low power. The step is proportional to current, so nothing at low power tells you anything about it.
• A ring at a few megahertz on Vce that a bigger snubber does not cure. Loop inductance. T3sl4co1l reads 116 nH straight off a 3.3 MHz ring and tells the builder to redo the layout rather than size around it. A snubber that damps that ring is paying for the layout in watts, every cycle, forever.
• A slower gate that changed nothing. davekni took the gate fall from 12 ns to 30, to 50, to 120, and reports "Still same spike amplitude", because the current fall is delayed enough from the gate that gate timing does not reach it. Read that for what it was: he made those edges by slowing the ramp feeding the buffer, not with a gate resistor. When he did fit one, ten ohms in series, it behaved differently, giving "expected Miller plateau and somewhat lower peak Vce", and he paid for it in turn-off energy, 1.7 mJ against 1.45. A gate resistor is a real lever on the peak. It is a small one, and it is bought with heat in the die.
• Thick solder poured over the power traces and the spikes are the same. Correct, and expected. Inductance is enclosed area, not cross section. Planes.
• A ring that appears only just after the overcurrent trips. The second loop, film capacitors out to the bulk bank, being asked to reverse the direction of power flow instantly. davekni had to rebuild that interconnect on his own coil for this exact reason and caught it on the scope rather than in the smoke.
• The transient cannot be photographed at all: every attempt is buried in switching noise. Common, and it is why the low-bus measurement matters. AstRii tried twisted cables and a common mode choke, got an unreadable waveform at high input, and by his own account gave up and hoped the spikes were not high enough.

Where next

• The bridge and what kills it, for the layout list this page keeps pointing at, and for the slower failure mechanism that runs underneath this fast one.
• IGBT or MOSFET, where the 1.5 times rule lives and where the same 700 V die measurement is read as a device question rather than a loop question.
• Switching at zero is the failure case, because whether your turn-off is soft is what sets the coefficient everything on this page is multiplied by.
• A high bus and a low bridge, for the one arrangement that deliberately spends its margin, and what it puts in the way first.

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Every figure on this page is somebody else's measurement, taken from the threads linked beside it. The multiplications are ours, and they are arithmetic on those readings rather than anything measured here. Where a thread's own participants say a multiplication should not be made, that is said beside it rather than tidied away.