You cannot open the top and bottom devices of a leg together: that is a short across the bus, it is called shoot-through, and it kills switches instantly. The cure is a pause, and the pause creates the next problem.
What it is and why
The pause between closing one device and opening the other is dead time. With both devices off, the current in the inductance has nowhere to go, and interrupting current in an inductance is the thing you must never do: you get back EMF, the same effect as a relay or a motor.
So each device gets a diode across it, a freewheel diode, which gives the current a path and clamps the overshoot to the bus.
Where the current goes during that pause depends on your tuning, and this is why detuning is dangerous rather than merely inefficient. Burnett's three cases:
- Bridge above resonance. The current changes sign after the pause, and the freewheel diodes carry it. Relatively gentle, and this is where zero voltage switching is possible.
- Bridge exactly at resonance. The current is near zero and the diodes barely work. That is the best case for the diodes and it is not the best case for the leg: with no current left at the switching instant, nothing carries the leg's capacitance across during the pause, and the opposite device turns on into the full bus. This site works that half out under the title switching at zero is the failure case, which is the same condition read from the other end.
- Bridge below resonance. The current changes sign before the pause, so it goes through the diodes, and their reverse recovery hits the switches.
Burnett (sstate3): most of the stresses that a solid-state driver experiences in this application are a result of large currents being commutated between switches and free-wheel diodes.
The diodes and the transition pull opposite ways, and this page is about the diodes. Burnett's remedy for them is accurate tuning; the remedy for the transition is the opposite of that, deliberate leftover current at turn-off, and on the failure case page V-Troxi and davekni take opposite sides of exactly that choice. Which one binds is a property of your bridge rather than a general answer, and nothing below should be read as settling it.
What you decide
How long the pause is
Criterion: long enough, and not a nanosecond more than that. Two things set the floor, and the binding one is whichever is longer.
The first is shoot-through, and what sets it is the gate loop: the asymmetry between the turn-off and turn-on constants is the dead time, and cross conduction is a shortage of it rather than a fault in the phase lead.
The second only appears once the bridge is trying to switch softly. The leftover current has to carry the leg's capacitance from one rail to the other inside the pause, and the gate loop page states it as a ceiling on snubber capacitance: having enough charge to commutate the node is not sufficient, the transfer also has to fit in the time. Read the other way round, that is a floor under the pause. Its worked numbers are a DRSSTC bridge's rather than an SSTC's, so take the shape of the argument from them and not the nanoseconds.
Above that floor Burnett's rule stands, and the rest of this page is why.
Whatever you set, normalise it as a fraction of the period rather than in nanoseconds, because that fraction is 2 · t_dead · f. The same setting carried off a 150 kHz coil onto a 365 kHz one costs 2.4 times as much of the period [derived, 365 ÷ 150], and those are two coils rather than one machine's range. The columns are worked below.
Which diode does the freewheeling
Every MOSFET has a parasitic diode between drain and source, so it looks as though the freewheel diode comes free. It is a trap.
Burnett (sstate3): the MOSFET body-diode is a side effect of the fabrication process and is not a particularly good diode.
Burnett again, on the recovery: when compared to discrete high speed diodes, the body-diode's reverse recovery time is very long.
The classical fix, where it matters: a Schottky in series with the drain, so the body diode can never conduct at all, with a fast external diode across the pair. A Schottky stores no charge and turns off immediately, and the bonus is Burnett's: the free-wheel current no longer enters onto the MOSFET die.
The series part is what makes the external diode work at all, and this site has the case that shows it. On the snubber section of the ZVS page the reference bridge's IPW65R080CFD has a body diode that drops less than the external SiC Schottky sitting beside it, so a diode fitted antiparallel and nothing else never turns on at all. The same page carries the case where the whole question goes away: its device is a CFD, a Cool Fast Diode, whose recovered charge it prints an order of magnitude below an ordinary superjunction's, and a body diode that good needs no external one beside it. That page called the diode slow for a while, which was the wrong way round for the figures printed under the word, and it has since been corrected.
What to do if the external diodes still cannot keep up
Slow the turn-on down. The diode gets more time to recover, the reverse current peak falls, and less interference is radiated. It is the opposite of the instinct and it is Burnett's advice.
It is also the half of the edge you have to take care to buy. A plain series gate resistor does not know which edge it is on and slows both, and the turn-off half of that comes straight out of the dead time you have just set. The component that tells the two directions apart is a diode across the resistor, cathode towards the driver, and it is on the gate loop page with the warning that belongs to it: bypass the resistor completely and you remove the dead time the asymmetry was giving you.
And it is a fraction of the period, not a number of nanoseconds
There are two dead zones in a cycle, so the share of the period with neither device driving is 2 · t_dead · f. Both the figure and the arithmetic on it are Shane Colton's, from the bench testing of the driver on his Δt coil:
Colton (Δt3 driver testing): at 150 kHz, two 377 ns dead times account for about 11 per cent of the PWM cycle.
He read the 377 ns off the gate drive with about 8 Ω of external gate resistance in the loop, on the same capture that gives his rise and fall times as roughly 100 ns. His primary resonates at 154.5 kHz rather than the round 150 he does the sum at, where the same setting is 11.6 per cent [derived, 2 × 377 ns × 154.5 kHz]. He calls it long for a motor drive and acceptable for a Tesla coil driver, which spends its on time near 50 per cent anyway.
That verdict belongs to his coil. Hold the nanoseconds still and move the frequency and it stops being his verdict:
2 · t_dead · f the share of the period with the bridge off
377 ns 154.5 kHz Colton's own coil 11.6 %
377 ns 519.1 kHz his setting on this site's QCW 39.1 % *
37 ns 519.1 kHz what that machine actually runs 3.8 %
37 ns 154.5 kHz this site's setting on his coil 1.1 %
* nobody runs that: the row is what carrying his setting across would cost
all four [derived] from the two dead times and the two frequencies, and both
frequencies belong to a coil that exists377 ns crosses a quarter of the period at 332 kHz [derived, 0.25 / (2 × 377 ns)], so any coil faster than that hands more than a quarter of every cycle to a pause settled on Colton's bench. Between the two ends of that list the idle share moves by a factor of 34 [derived, (377 / 37) × (519.1 / 154.5)], and both settings are right where they were set.
On a ramped coil the fraction moves while you watch
Everything above compares one coil against another. A QCW does it to itself inside a single bang, because the working frequency slides down the ramp as the arc loads the secondary. This site's machine runs its upper pole from 519.1 kHz with no arc out down to 463.3 with a metre and a half of arc on it. That trajectory is this corpus's own arithmetic on JavaTC's two resonances rather than anybody's published measurement, and it is worked at the frequency slides down the ramp.
The dead time is a fixed number of nanoseconds, so 2 · t_dead · f is largest at the start of the ramp and smallest at the end. On that machine's own 37 ns the share runs 3.8 per cent of the period at the top against 3.4 at the bottom [derived]. That is the right direction carrying almost no weight, and the ramp page works the same two figures and says so: across a ramp it is the phase lead that moves enough to decide anything, and not the dead time.
Two things follow, and the second is the one to carry away.
The floor does not move. Whatever the gate loop needs in order to keep the two devices apart is a number of nanoseconds and it is the same number at both ends of the ramp, so a pause that is long enough at the start is long enough everywhere after it. What moves is the price. At the top of the sweep the same pause is a larger share of a shorter period, so set it at the beginning, where it costs most, and nothing later in the bang asks for more.
And too little dead time is shoot-through, not a phase lead fault. The cure for it is at the gate loop rather than in the lead network. It is not the only route to cross conduction, since a slow body diode manages it with a generous pause in place, and that case belongs to the freewheel diodes. What sets the floor from the other side is that the bridge has to finish recharging its own switching node out of the residual current before the pause ends, which is what a phase lead buys.
Measuring the tank's resistance instead of calculating it
The same write-up carries a second number of the kind people copy, and it was got the same way, by measurement rather than by assumption.
Colton captured the real gate drive waveform, exported it into a SPICE model of the driver and the primary LRC together, ran the whole pulse train, and adjusted the resistance in the model until its decay envelope matched the one on the scope. What came out was about 90 mΩ in the primary, and he put the size of it down to skin effect: the 8 AWG grounding wire he wound it from behaving like something a good deal thinner.
The arithmetic agrees with him to within a gauge. The skin depth in copper is
delta = 65.2 / sqrt(f) mm, f in Hzderived from sqrt(rho / (pi · mu_0 · f)) at rho = 1.68e-8 Ω·m; the same constant returns the 0.103 mm at 400 kHz that [the primary is an impedance carries]. At his 154.5 kHz that is 0.166 mm. 8 AWG is 3.26 mm across and 8.36 mm² of copper [derived, 0.127 · 92^((36 − n)/39) mm], and a 0.166 mm shell on that diameter is 1.61 mm² [derived, pi · delta · (D − delta)], which is 19 per cent of the copper in the wire. 15 AWG is 1.65 mm² by the same formula and 14 AWG is 2.08. He read 14 off the bench fit, the formula says 15, and one gauge step apart on a number obtained two unrelated ways is agreement. What that agreement covers is the gauge and not the whole 90 mΩ: how much of the tank's resistance sits in the primary rather than in the capacitors, the bus and the joints is not settled here.
Source: Shane Colton's Δt3 driver testing for the 377 ns, the 90 mΩ, and the tank figures, all of them measured on one coil. The 519.1 to 463.3 kHz trajectory and the 37 ns are this site's own machine, on the frequency slides down the ramp. Every percentage on this page is our arithmetic on those.
What will get you
And know which side of resonance you are sitting on, because that is the same decision as which stress you are choosing to take. Above it the diodes carry the pause and turn off softly. Below it they are commutated by the opposite switch. At it they barely conduct, and the transition is the one that has to be paid for.
The numbers
- The safe side of resonance: above it. Below it the diodes commutate into the switches.
- Dead time: the longer of the two floors, shoot-through and the node transfer, and no more than that, expressed as a fraction of the period.
- Voltage margin on the devices: not set here. The site's rule is a part rated at least 1.5 times the highest voltage that can reach the bridge, a floor rather than a range, which from a 320 V bus comes out at 600 V parts [derived, 320 × 1.5 is 480 and 600 is the next standard rating], and it lives on IGBT or MOSFET. What the freewheel path buys is that the bridge output is clamped to the bus in the first place, so a missing or slow one spends that margin before anything else does.
What goes wrong
- Devices die at one tuning and survive at another. Running below resonance, where reverse recovery lands on the switches. The phase lead is what puts the switching instant on one side of the current zero or the other, so the same symptom is filed under it as well: what a phase lead actually buys.
- Shoot-through despite a generous dead time. The body diode, not the timing.
- Large overshoot on the bridge output. Missing or slow freewheel path; the current in the inductance had nowhere to go.
- Adding dead time made it worse. It would. See the loop above.
- Radiated interference that arrived with a faster gate drive. Reverse recovery. Slowing the turn-on is the fix here, not speeding it up.
Where next
- Switching at zero is the failure case, which takes the opposite side of the tuning argument above and works it in numbers.
- IGBT or MOSFET, which device type to reach for, and its body diode is part of that answer.
- The gate loop is an RLC, which sets the dead time in the first place.
- An SSTC primary is a different part, where the worked primary current for choosing devices lives.
Attribution: the three cases, the body diode argument, the series Schottky and the excessive dead time loop are Burnett's, on sstate3. The second floor under the pause, the gate resistor asymmetry and the device pair whose own body diode beats the Schottky beside it are this site's pages, linked where they are used. The two pieces of arithmetic here are 365 divided by 150 and 320 times 1.5.