If the top and bottom devices of a leg are on at the same time, they short the bus. That is shoot-through, and it kills switches instantly. The fix is a short pause between one turning off and the other turning on, and that pause brings its own problem.
What it is and why
The pause between turning one device off and the other on is dead time. With both devices off, the current in the inductance has nowhere to go. Interrupt current in an inductance and you get back EMF, the same as with a relay coil or a motor.
Each device gets a diode across it, a freewheel diode, which gives the current a path and clamps the overshoot to the bus.
Where the current goes during the pause depends on your tuning. That makes detuning dangerous, not just inefficient. Burnett gives three cases.
- Bridge above resonance. The current changes sign after the pause, and the freewheel diodes carry it. Relatively gentle, and this is where zero voltage switching is possible.
- Bridge exactly at resonance. The current is near zero and the diodes barely work. That is the best case for the diodes but not for the leg. With no current left at the switching instant, nothing carries the leg's capacitance across during the pause, and the opposite device turns on into the full bus. That side of it is worked out in switching at zero is the failure case.
- Bridge below resonance. The current changes sign before the pause, so it goes through the diodes, and their reverse recovery hits the switches.
Burnett (sstate3): most of the stresses that a solid-state driver experiences in this application are a result of large currents being commutated between switches and free-wheel diodes.
The diodes and the transition pull opposite ways, and this article is about the diodes. Burnett's remedy for them is accurate tuning. The remedy for the transition is the opposite: deliberate leftover current at turn-off. On the failure case page V-Troxi and davekni take opposite sides of that choice. Which one matters more depends on your bridge, and there is no general answer.
What you decide
How long the pause is
Criterion: long enough, and not a nanosecond longer. Two things set the minimum, and whichever is longer wins.
The first is shoot-through, which is set by the gate loop. The asymmetry between the turn-off and turn-on time constants is the dead time, and cross conduction means there is too little of it, not that the phase lead is wrong.
One published sheet shows a board with no dead time at all, and the repair.
The second only matters once the bridge is trying to switch softly. The leftover current has to carry the leg's capacitance from one rail to the other inside the pause. The gate loop page states this as a ceiling on snubber capacitance: there has to be enough charge to commutate the node, and the transfer also has to fit in the time. Turned around, that sets a minimum pause. Its worked numbers are for a DRSSTC bridge, not an SSTC, so take the shape of the argument from them and not the nanoseconds.
Above that minimum, Burnett's rule applies, for the reasons below.
Whatever you set, think of it as a fraction of the period, not as nanoseconds. The fraction is 2 · t_dead · f. The same setting moved from a 150 kHz coil to a 365 kHz one takes 2.4 times as much of the period [derived, 365 ÷ 150], and those are two different coils, not one machine's range. The table is below.
Which diode does the freewheeling
Every MOSFET has a parasitic diode between drain and source, so it looks as though you get the freewheel diode for free. It is a poor one.
Burnett (sstate3): the MOSFET body-diode is a side effect of the fabrication process and is not a particularly good diode.
Burnett again, on the recovery: when compared to discrete high speed diodes, the body-diode's reverse recovery time is very long.
Where it matters, the classic fix is a Schottky in series with the drain, so the body diode can never conduct, plus a fast external diode across the pair. A Schottky stores no charge and turns off immediately. Burnett adds a bonus: the free-wheel current no longer flows through the MOSFET die.
Without the series Schottky the external diode may never conduct. On the snubber section of the ZVS page the reference bridge's IPW65R080CFD has a body diode that drops less than the external SiC Schottky beside it, so a diode fitted antiparallel and nothing else never turns on. The same page also has the case where the problem goes away. Its device is a CFD, a Cool Fast Diode, with recovered charge an order of magnitude below an ordinary superjunction's, and a body diode that good needs no external one.
What to do if the external diodes still cannot keep up
Slow the turn-on down. The diode gets more time to recover, the reverse current peak falls, and less interference is radiated. It goes against instinct, and it is Burnett's advice.
Only slow the turn-on, though. A plain series gate resistor slows both edges, and the slower turn-off eats into the dead time you just set. To treat the two directions differently, put a diode across the resistor, cathode towards the driver. That is on the gate loop page, with its warning: bypass the resistor completely and you lose the dead time the asymmetry was giving you.
And it is a fraction of the period, not a number of nanoseconds
There are two dead zones in a cycle, so the share of the period with neither device driving is 2 · t_dead · f. Both the figure and the arithmetic on it are Shane Colton's, from the bench testing of the driver on his Δt coil:
Colton (Δt3 driver testing): at 150 kHz, two 377 ns dead times account for about 11 per cent of the PWM cycle.
He read the 377 ns off the gate drive with about 8 Ω of external gate resistance in the loop, on the same capture that gives his rise and fall times as roughly 100 ns. His primary resonates at 154.5 kHz rather than the round 150 he does the sum at, where the same setting is 11.6 per cent [derived, 2 × 377 ns × 154.5 kHz]. He calls it long for a motor drive and acceptable for a Tesla coil driver, which spends its on time near 50 per cent anyway.
That judgement is for his coil. Keep the nanoseconds and change the frequency, and the share changes a lot:
2 · t_dead · f the share of the period with the bridge off
377 ns 154.5 kHz Colton's own coil 11.6 %
377 ns 519.1 kHz his setting on this site's QCW 39.1 % *
37 ns 519.1 kHz what that machine actually runs 3.8 %
37 ns 154.5 kHz this site's setting on his coil 1.1 %
* nobody runs that: the row is what carrying his setting across would cost
all four [derived] from the two dead times and the two frequencies, and both
frequencies belong to a coil that exists377 ns crosses a quarter of the period at 332 kHz [derived, 0.25 / (2 × 377 ns)], so on any coil faster than that a pause chosen on Colton's bench takes more than a quarter of every cycle. Between the two ends of that list the idle share changes by a factor of 34 [derived, (377 / 37) × (519.1 / 154.5)], and each setting is right on the coil it was set for.
On a ramped coil the fraction moves while you watch
The comparisons above are between coils. A QCW changes frequency inside a single bang, because the working frequency slides down the ramp as the arc loads the secondary. Our machine runs its upper pole from 519.1 kHz with no arc down to 463.3 with a metre and a half of arc on it. That trajectory is our own arithmetic on JavaTC's two resonances, not a published measurement, and it is worked in the frequency slides down the ramp.
The dead time is a fixed number of nanoseconds, so 2 · t_dead · f is largest at the start of the ramp and smallest at the end. With that machine's 37 ns the share is 3.8 per cent of the period at the top and 3.4 at the bottom [derived]. The change is real but tiny. The ramp article works the same two figures and comes to the same conclusion: across a ramp the phase lead moves enough to matter and the dead time does not.
Two things follow.
First, the minimum does not move. Whatever the gate loop needs to keep the two devices apart is a number of nanoseconds, the same at both ends of the ramp, so a pause long enough at the start is long enough for the rest of the bang. What changes is the cost. At the top of the sweep the same pause is a larger share of a shorter period. Set it for the beginning, where it costs most, and nothing later in the bang needs more.
Second, too little dead time causes shoot-through, and that is not a phase lead fault. Fix it at the gate loop, not in the lead network. It is not the only route to cross conduction: a slow body diode can cause it even with a generous pause, and that case belongs to the freewheel diodes. From the other side, the floor is set by the bridge having to finish recharging its own switching node out of the residual current before the pause ends. That is in what a phase lead buys.
Measuring the tank's resistance instead of calculating it
Colton's write-up has a second number that people copy, and he got it the same way, by measuring.
Colton captured the real gate drive waveform, exported it into a SPICE model of the driver and the primary LRC together, ran the whole pulse train, and adjusted the resistance in the model until its decay envelope matched the one on the scope. What came out was about 90 mΩ in the primary, and he put the size of it down to skin effect: the 8 AWG grounding wire he wound it from behaving like something a good deal thinner.
The arithmetic agrees with him to within one wire gauge. The skin depth in copper is
delta = 65.2 / sqrt(f) mm, f in Hzderived from sqrt(rho / (pi · mu_0 · f)) at rho = 1.68e-8 Ω·m; the same constant returns the 0.103 mm at 400 kHz that [the primary is an impedance carries]. At his 154.5 kHz that is 0.166 mm. 8 AWG is 3.26 mm across and 8.36 mm² of copper [derived, 0.127 · 92^((36 - n)/39) mm], and a 0.166 mm shell on that diameter is 1.61 mm² [derived, pi · delta · (D - delta)], which is 19 per cent of the copper in the wire. 15 AWG is 1.65 mm² by the same formula and 14 AWG is 2.08. He read 14 off the bench fit and the formula says
- One gauge apart, from two unrelated methods, counts as agreement. That only covers the gauge, not the whole 90 mΩ. It does not tell you how much of the tank's resistance is in the primary and how much in the capacitors, the bus and the joints.
His own two figures do say more about that split. Δt2 puts the primary circuit at "a total resistance of only about 70mΩ", and the fit above puts it at 90. If the conductor's own resistance rises by the ratio of its copper to its working shell, 8.36 over 1.61, which is 5.2 times, then a rise of 20 mΩ in the total means the conductor was carrying about 4.8 mΩ of the calculated 70, or 7 per cent [derived, all three]. The capacitors, the bus and the joints hold the other 93.
That depends on one assumption, the same one his own reasoning needs: that the 70 was calculated without skin effect. If skin effect had been included, there would be no gap to put down to it. So the figure is only as good as that assumption. If it holds, sizing the primary copper is the smaller half of the job.
His other figures on that page check each other. The primary tapped at six turns measures 10.6 µH and resonates at 154.5 kHz, with the tank capacitance measured at almost exactly 100 nF. 10.6 µH against 100 nF resonates at 154.6 kHz [derived], which is the frequency he read.
Source: Shane Colton's Δt3 driver testing for the 377 ns, the 90 mΩ, and the tank figures, all of them measured on one coil. The 519.1 to 463.3 kHz trajectory and the 37 ns are from our own machine, on the frequency slides down the ramp. Every percentage here is our arithmetic on those.
What will get you
Know which side of resonance you are on, because that decides which stress you take. Above it the diodes carry the pause and turn off softly. Below it they are commutated by the opposite switch. At resonance they barely conduct, and the transition takes the stress instead.
The numbers
- The safe side of resonance: above it. Below it the diodes commutate into the switches.
- Dead time: the longer of the two floors, shoot-through and the node transfer, and no more than that, expressed as a fraction of the period.
- Voltage margin on the devices: not set here. The site's rule is a part rated at least 1.5 times the highest voltage that can reach the bridge, a floor rather than a range, which from a 320 V bus comes out at 600 V parts [derived, 320 × 1.5 is 480 and 600 is the next standard rating], and it is on IGBT or MOSFET. The freewheel path is what clamps the bridge output to the bus in the first place, so a missing or slow one uses up that margin before anything else does.
What goes wrong
- Devices die at one tuning and survive at another. Running below resonance, where reverse recovery lands on the switches. The phase lead is what puts the switching instant on one side of the current zero or the other, so the same symptom is filed under it as well: what a phase lead actually buys.
- Shoot-through despite a generous dead time. The body diode, not the timing.
- Large overshoot on the bridge output. Missing or slow freewheel path; the current in the inductance had nowhere to go.
- Adding dead time made it worse. Expected. See the warning above.
- Radiated interference that arrived with a faster gate drive. Reverse recovery. Slowing the turn-on is the fix here, not speeding it up.
Where next
- Switching at zero is the failure case, which takes the opposite side of the tuning argument above and works it in numbers.
- IGBT or MOSFET, which device type to use, where the body diode is part of the answer.
- The gate loop is an RLC, which sets the dead time in the first place.
- An SSTC primary is a different part, where the worked primary current for choosing devices lives.
Attribution: the three cases, the body diode argument, the series Schottky and the excessive dead time loop are Burnett's, on sstate3. The second minimum on the pause, the gate resistor asymmetry and the device pair whose own body diode beats the Schottky beside it come from our other articles, linked where they are used. The two pieces of arithmetic here are 365 divided by 150 and 320 times 1.5.