The author states two goals: switch between SSTC and DRSSTC operation on one board, and bring the cost down. Both show on the sheet. The mode split is a pair of 74HC74 flip-flops feeding two jumper blocks silkscreened “SSTC” and “DRSSTC” (J7/J9 against J5/J8), so the same board is wired either way by moving links. The cost cuts are two substitutions. A mains zero-crossing detector built from “vanilla components” (AC_L and AC_N through 220 kΩ into a 1N5819 bridge, a 22 kΩ divider, a 2N3904 and a 4N35 optocoupler) replaces a bulky mains transformer. An ESP32-DEVKIT-V1 on the board itself acts as the interrupter, taking frequency and duty from a second ESP32 over Bluetooth instead of an optical link.
The signal path is conventional and complete. An LTE-99002 feedback transformer into a 74HC14 Schmitt chain produces UCC_CLOCK, which drives a UCC27321P and a UCC27322P (the inverting/non-inverting pair) onto the gate-drive transformer at J2. Supply is LM7812 into LM7805 off 100-240 V 50/60 Hz, and two rotary encoders come out on their own headers. The author annotated the sheet himself: “R2 can be omitted if using 1N5819 schottky diodes”, and on the silkscreen, “use high power resistor for DRSSTC” and “use esp32 as interuppter”.
Shown here built and wired to a half-bridge on two heatsinks, with its gate-drive transformer and snubbers. It is a real photograph, not a render. There are two gaps. The schematic’s title block is completely blank (no title, no date, no revision, only the filename sstc_driver.kicad_sch and KiCad 7.0.10). And the design is published as images in the forum thread, with no repository, Gerbers or project files alongside it. The thread drew answers from davekni, ZakW and Anders Mikkelsen.
Schematics and photos
schematic: the updated revision (KiCad 7.0.10, sstc_driver.kicad_sch, title block blank) 
PCB 3D render, top: the SSTC/DRSSTC jumper blocks and the ESP32 footprint
Sources
This is the card from the driver tree, written from what the builder published. Send corrections through the forum.