A separate and much more complete project from the same Hossein Naderi who built the DRSSTC v2 elsewhere on this tree. It is called Ātar-Gāthā ("Fire-Hymn" in Persian). It was his first high-power SSTC, and by his own account "many failures and explosions along the way." Three full KiCad design generations are published, v1 through v3, each with complete schematics. v3 had two fabricated board revisions, 3.1 and 3.2, and comes with full Gerbers. Current/antenna feedback is clipped and squared by a Schmitt trigger into a HEF4046 PLL, with center frequency, phase and range each set by its own trimmer. Paired flip-flops split it into two anti-phase drive lines and only let interrupts land on a clock edge, never mid-conduction. A TC4427 push-pull stage then drives the gate-drive transformer. Bluetooth audio (an MH-M18 module) biases the VCO input directly. That detunes the drive just enough to modulate loudness without a separate amplitude stage, "producing remarkably clear audio," in his words. Logic runs on 12-24 VDC, into either MOSFET or IGBT bridges, with overcurrent detection, UVLO and a secure CW start. Demonstrated at 300 VDC / 2.5 kW in CW mode. Board photos and the full schematic set are on his own project site, next to the GitHub repository.
Schematics and photos
driver schematic (v3.2, HNaderi's PLL SSTC)
Sources
This is the card from the driver tree, written from what the builder published. Send corrections through the forum.