Posted under the blog handle Bayley, two years before loneoceans' QCW 1, and citing the same inspiration: Ward's original ramped coil, "~60 in of spark off a 9 in secondary." A synchronous buck/class-D stage (two IGBT bricks, an LC filter, RCD snubbers) chops the capacitor bank's DC bus into the ramp. A P-N half-bridge gate drive is sized to charge the bricks' 200+ nF gate capacitance quickly. An Mbed microcontroller does bang-bang hysteresis control against upper and lower voltage thresholds instead of a fixed PWM duty cycle. It was built into a working water-cooled bridge and secondary, not left on the bench. The write-up shows its rough edges, including a correction added three months later: "damn I fail at designing RCD snubbers. Schematic updated."
Schematics and photos
power-stage schematic 
gate-drive schematic
Sources
This is the card from the driver tree, written from what the builder published. Send corrections through the forum.