What changed because of them
Ward built his first SSTC in May 2003 on Justin Hays' design and then six more in three years, each trying a different idea: a full bridge, a twin, a mini, a micro, a Class-E stage after seeing Richie Burnett's 4 MHz coil. The micro is the one that travelled furthest. Nine years later it is the circuit loneoceans' first SSTC descends from, through Rob Bryon's version of it.
In 2004 he scaled the interrupted SSTC up into the first of four DRSSTCs in eighteen months. DRSSTC-2 was the first solid-state coil past ten feet. In September 2005 he wrote the General Guide to DRSSTC Design, which turned something people had learned thread by thread into a procedure. In 2008 he published the Universal Driver, UD1.3b, with schematic, board files and a parts list, built from ordinary logic parts so anyone could reproduce it. Almost every driver board on the tree points back to that card.
UD2.1b in 2009 added phase lead, so the bridge switches slightly ahead of the current zero and the IGBTs turn on soft. Around the same time he conceived the QCW: a DRSSTC fed from a bus that ramps up over the burst, giving long straight arcs more than ten times the length of the winding. Everything on the records wall descends from that idea.
He is still building. The three-phase coil of 2019 to 2020 is three SiC half bridges switched 120 degrees apart under one STM32, published in full as three Altium sheets, including a warning in his own hand about an isolator that will destroy the PFC switch if its input disappears.
Their boards

SSTC-1 
schematic p.1: supply + oscillator (555, MAX913, 74HC14), Rev 1.0, 6 Jun 2003 
schematic p.2: gate drive into a 15:15:15 GDT 
schematic p.3: half bridge, IRFP260 ×2, 140 V max, with no-variac start-up 
Micro SSTC (SSTC-6) 
ISSTC 
“ISSTC controller”, schematic p.1: 1:60 feedback CT, UCC37321/37322, 555 interrupter (Rev 1.0, 8 Apr 2004) 
“ISSTC Power Electronics”, schematic p.2: full bridge, GDT 1:2:2, already-tuned L1/C1 primary 
Class-E SSTC 
DRSSTC-2 
DRSSTC Magnifier Mk I 
lower deck: bus caps, heatsink and driver board 
DRSSTC-4 
UD1.3b 
schematic: “DRSSTC Controller, Steven Ward 2008, revision 1.3b” (EAGLE sheet, 25 Jun 2009) 
schematic: revision 1.1b with the author’s own modification list printed on the sheet (modified 25 Jun 2009) 
Steve Ward, three-phase “tree phase” coil 
“3PTC brain” schematic: STM32F405, three phase channels, mains sync (Altium, 15 Nov 2019) 
phase half bridge schematic: Si8231 into NCP81074 into C3M0021120K SiC (27 Jun 2020) 
schematic: SiC boost PFC, with his own warning about the ISO721 
DRSSTC-1 
“DRSSTC-1 with OCD” schematic, Rev 192, 17 Mar 2005: four 1:33 CTs, 74HC109N, paralleled UCC37321/37322, LM311 overcurrent 
DRSSTC-3 
DRSSTC-.5 
SSTC-2 
SSTC-3 
Mini SSTC (SSTC-5)
Builds and boards on the tree
- SSTC-1 · May 2003
- Micro SSTC (SSTC-6) · Nov 2003
- ISSTC · 2004
- Class-E SSTC · May 2005
- DRSSTC-2, first past ten feet · 2004 to 2006
- DRSSTC Magnifier Mk I · Apr 2005
- A General Guide to DRSSTC Design · Sep 2005
- DRSSTC-4 · Jul 2008
- UD1.3b, the Universal Driver · 2008 to 2009
- UD2.1b, phase lead · 2009 to 2012
- The first QCW · 2009 to 2010
- Three-phase coil · 2019 to 2020
Sources
Written from what Steve Ward published, by one person, so it can be wrong in places. The page is meant to become editable, wiki-style, by profiles above a trust level. Until then, corrections go to the forum, and anything Steve Ward asks to change or remove is changed the same day.