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[ driver tree · DRSSTC · driver board · no assembled-board photo found ]

UD3.1: the PSoC5 DRSSTC and QCW driver, made for JLC assembly

PSoC5 · adjustable VDrive · JLC-assembleable · from 2023

The hardware successor to UD3, by Thorben Zethoff (TMaxElectronics), a touring Tesla-coil performer in Germany. The PCB silkscreen credits the full lineage: "UD3.1c: Steve Ward, Jens Kerrinnes, Thorben Zethoff." It keeps the PSoC5 core and firmware base of UD3 (still Netzpfuscher's codebase), but the board is reworked. The voltage-sense amplifiers moved to a single 5V rail. A buck regulator makes VDrive adjustable 10-24V instead of fixed. The gate drive accepts a wider range of N+P FET pairs. Protection resistors are added in series with every gate and relay/LED pin, and the expansion headers get more supply rails. Almost all of it can be built through JLCPCB's assembly service; only the PSoC itself needs hand soldering. Three board revisions (1.1a/b/c) are in the repo, each with full Gerbers, BOM and pick-and-place files, plus an 8-page schematic PDF and a 3D STEP model. We have not found a photo of an assembled board yet, so this card is drawn from the schematic and the PCB render alone.

Schematics and photos

Sources

This is the card from the driver tree, written from what the builder published. Send corrections through the forum.